Principal Signal Integrity Engineer

Job Overview Principal Signal Integrity Engineer, day shift, responsible for completing tasks on time, solving short‑ and long‑term problems, improving SI/PI performance, completing production design analysis, measurement, and characterization with customers and engineers across multiple sites, including California, Europe, and Asia. Key Responsibilities Design & Analysis: Perform signal and power integrity analysis for high‑speed interconnects (PCB, package, MLO, probe card). Develop and validate electrical models for transmission lines, vias, connectors, and PDN structure. Define stack‑ups, impedance targets, and routing constraints. Evaluate and optimize reflections, insertion/return loss, crosstalk, and jitter performance. Simulation & Modeling: Use EM and circuit tools such as HFSS, ADS, SIwave, PowerSI for frequency‑domain and time‑domain analysis. Build system/channel models (IBIS‑AMI, eye diagrams). Run what‑if studies to optimize performance and reduce design risk. Testing & Validation: Define and execute SI validation plans using VNA, TDR, TDT and high‑speed measurement setups. Define test fixtures and correlation structures. Drive simulation‑to‑measurement correlation and root cause analysis. Drive design improvements based on measured data. Design Support & Collaboration: Provide design guidelines, constraints, and best practices to layout teams and electrical design engineers. Collaborate globally with engineering teams and customers. Support new product development programs such as probe cards and load boards. Continuous Improvement & Innovation: Improve modeling methodologies and design workflows. Reduce simulation cycle time and improve design quality. Stay current with high‑speed interfaces (PCIe, HBM, SerDes) and emerging packaging and interconnect technologies. Contribute to next‑generation architecture and roadmap development. Preferred Qualifications BS/MS in Electrical Engineering (or related field). 4+ years of relevant experience in SI/PI analysis and design. Strong understanding of transmission line theory, power integrity principles, and crosstalk and signal degradation mechanisms. Experience with tools such as HFSS, ADS, SIwave, PowerSI, PowerDC, SPICE, Allegro, MATLAB. Hands‑on experience with measurement tools (VNA, TDR/TDT). Experience with high‑speed interfaces (PAM4, SerDes, PCIe, HBM). Scripting/automation skills (Python, MATLAB). Experience in advanced packaging, probe cards, or fine‑pitch interconnects. Skills Allegro PCB Designer ANSYS HFSS Cadence tools High speed interfaces MATLAB Power distribution design Power integrity PSpice circuit simulation Python (programming language) SERDES Signal integrity Signal integrity analysis Transmission line design Education & Experience Minimum of 5 years of related experience with a Bachelor’s degree; or 3 years with a Master’s degree; or a PhD without experience; or equivalent work. Compensation Pay range: $110,700.00 – $145,320.00 per year, in Livermore, California. Pay may vary in other locations. Benefits We offer a full benefits package, including medical, dental, vision, life insurance, disability coverage, a 401(k) with company match, employee stock purchase plan (ESPP), paid time off, quarterly profit‑sharing bonuses, and flexible spending or savings accounts. Equal Employment Opportunity Statement FormFactor is an equal opportunity employer. FormFactor complies with all national, state, and local laws that seek to promote equal opportunities for any applicant or employee without regard to age, race, color, gender, gender identity/expression, national origin, sexual orientation, religion, disability, marital status, pregnancy or related condition, military service, or any other legally protected characteristics. These protections apply to all aspects of employment, including but not limited to recruitment, hiring, training, promotions, and compensation. #J-18808-Ljbffr