Lead ASIC Verification Architect - Tape-out Ready
Jobleads-US
Eridu Corp. in Silicon Valley seeks a hands-on ASIC Design Verification Lead to own verification strategy and tape-out readiness for high-performance networking silicon. You will drive test plans, build scalable verification environments, and lead cross-functional debug with RTL, architecture, and firmware teams.
The ideal candidate has tape-out experience, deep SystemVerilog/UVM skills, and a pragmatic drive to improve verification quality in a fast-moving startup.
#J-18808-Ljbffr Jobleads-USVacancy posted 21 hours ago
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