Principal Engineer, GPU Design Verification (Subsystems)

Position SummarySamsung, a world leader in advanced semiconductor technology, is founded on a simple philosophy – the endless pursuit of excellence will create a better world for all. At Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we are building a center of excellence for Intellectual Property (IP) that is applied to high-performance computing devices (mobile, automotive, and other custom market segments) consumed by millions of people around the world. Come build with us!Role and ResponsibilitiesAs a Principal GPU Design Verification Engineer – Subsystems, you will lead the verification of one or more GPU subsystems for Samsung’s next-generation mobile GPU.In this high-impact and highly visible technical leadership role, you will define verification strategy and contribute hands-on to validating complex subsystem designs, ensuring functional correctness, performance integrity, and architectural intent. You bring deep expertise in GPU design verification, strong block- and subsystem-level architectural understanding, and a collaborative leadership style that aligns architecture, design, and software teams while supporting concurrent development cycles.You are a domain expert in multiple areas of subsystem-level verification. You lead verification strategy and execution for one or more GPU subsystems by developing comprehensive verification plans, defining verification goals, coverage metrics, and sign-off criteria aligned with architectural specifications and integration requirements.You excel at architecting and implementing advanced verification environments. You design, develop, and maintain scalable verification testbenches using SystemVerilog, UVM, and C++, developing test code in parallel with RTL and applying constrained-random testing, coverage-driven verification, and assertion-based techniques to validate complex block and subsystem behaviors.You elevate functional and performance excellence across subsystem coverage. You advance verification methodologies, tools, and automation to improve efficiency and quality, while creating targeted and scalable test scenarios that stress interactions across multiple blocks, interfaces, and data paths within the subsystem.You drive complex debug and issue resolution by leading team to analyze failures spanning blocks within a subsystem, identify root causes, and spearhead cross-functional collaboration to ensure verification aligns with architectural intent and system-level integration expectations.You inspire high performance by mentoring engineers, fostering a culture of ownership and innovation, and enabling mobility across blocks and subsystems to broaden technical depth and grow verification expertise.Skills and Qualifications15+ years of experience with a Bachelor’s degree in Computer Science/Engineering or related field, or 13+ years with a Master’s degree, or 11+ years with a Ph.D.10+ years of hands-on experience in GPU, CPU, or advanced semiconductor design verificationDeep understanding of computer architecture and GPU subsystem design, including block-level and subsystem-level integrationStrong programming skills in C/C++, Python, Perl, or equivalent.Deep expertise in SystemVerilog and UVM, including constrained-random testing, functional coverage, and assertions.Experience with building configurable UVM testbenches for reuse across design hierarchies, ensuring a block-level environment can seamlessly transition into a system-level environment.Proven track record of achieving multiple first-pass silicon success.Proven experience driving verification strategy and execution for multiple subsystem blocks and verification closure across interfaces.Excellent debugging, analytical, and problem-solving skills, with proven ability to identify bottlenecks, propose solutions and guide teams through implementation.Excellent communication and collaboration skills, with the ability to navigate ambiguity and influence in a fast-paced, global team environment.Nice to have:Knowledge of memory subsystem or coherent interconnects is a plus.Experience with performance-aware verification or performance profiling.Hardware modeling or emulation experience.Demonstrated passion for learning modern graphics architectures and evolving GPU technologies.Our Team The GPU Design Verification team at SARC/ACL owns verification coverage for Samsung’s current and next-generation mobile GPUs. Our work spans across three areas: Graphic Core, Subsystem Verification, and Formal Verification. As a globally distributed team, we work closely with architecture, design, software, emulation, and system-level partners to ensure GPU designs function effectively as a complete system. Our Xclipse GPU is the first mobile GPU with ray tracing technology that enables console-level graphics for Samsung Galaxy smartphones.You will join a diverse, collaborative organization to work on concurrent annual development lifecycles and see your work delivered in real consumer technologies. Here you’ll help build what’s next, broaden your expertise, and solve impactful challenges in a supportive environment that values collaboration, continuous learning, and growth.Total RewardsAt Samsung – SARC/ ACL, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $221,700 and $364,800. Your actual base pay will depend on variables that may include your education skills, qualifications, experience, and work location.Samsung employees have access to benefits including: medical, dental, vision, life insurance, 401(k), onsite lunch, employee purchase program, tuition assistance (after 6 months), paid time off, student loan program, wellness incentives, and many more. In addition, regular full-time employees (salaried or hourly) are eligible for MBO bonus compensation, based on company, division, and individual performance.Additionally, this role might be eligible to participate in long term incentive plan and relocation.This is an exempt position, which is not eligible for overtime pay under the Fair Labor Standards Act (FLSA).Trade Secrets By submitting an application, you agree not to disclose to Samsung or induce or encourage Samsung to use any confidential or proprietary information (including trade secrets) belonging to a current or former employer or other entity.U.S. Export ControlThis role may require access to information subject to U.S. export control laws. Applicants must be authorized to access such information or eligible for government authorization.#ACL* Please visit Samsung membership to see Privacy Policy, which defaults according to your location. You can change Country/Language at the bottom of the page. If you are European Economic Resident, please click here.* Samsung Electronics America, Inc. and its subsidiaries are committed to employing a diverse workforce, and provide Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, status as a qualified individual with a disability, or any other characteristic protected by law.SummaryLocation: 3655 N 1st St, San Jose, CA, USAType: Full time