Principal, Design Verification Engineer, UAL and PCIe Subsystems
$138k - $317.8kYK Solutions LLC
Position Title: Principal, Design Verification Engineer, UAL and PCIe Subsystems (Confidential Client)
Location: Santa Clara, CA | Onsite
Employment Type: Permanent
Compensation
- Salary: $138,000 - $317,800/yr
- Bonus: Base, bonus, RSU, refresher RSUs
Position Summary
As part of the Design Verification Team at Our Client, you will verify all of the circuitry that goes inside chips for the general market and for specific customers. These chips use cutting-edge technology to facilitate data transfers at high speeds, and you will help verify that each design meets customer specifications whether they are a major telecom organization or automotive company, etc.
In this role, you will develop the architecture for a functional verification environment, including reference models and bus-functional monitors and drivers and contribute to the methodology behind such development.
Primary Functions
- Writing a verification test plan using random techniques and coverage analysis and working with designers to ensure it is complete.
- Developing tests and tuning the environment to achieve coverage goals. Debugging failures and working with designers to resolve issues.
- Verifying boot code and architecting, developing, and maintaining tools to streamline the design of state-of-the-art multi-core SoCs.
- Transforming the requirements from the engineering teams into software tools that are both easy to use and scalable within a highly parallel compute environment.
- Unit and regression testing of software tools.
Must-Haves
- BS/MS/PhD in Computer Science, Electrical Engineering, or Computer Engineering, 10-12 years of relevant professional experience.
- Experience with System Verilog, UVM.
- Experience with writing a detailed test plan and building a sophisticated, directed, random-verification environment.
- Experience with scripting language such as Python or Perl and EDA Verification tools.
- Experience with Object-Oriented Design and implementation.
- Good understanding of Linux O.S.
- Good programming skills desired, especially C++ and ARM assembly.
- Prior working knowledge of UAL or PCIe protocols.
- Diligent, detail-oriented, and willing to take initiative and handle assignments with minimal supervision.
- Requires the ability to accept and work with differing opinions.
- Cannot be a close-minded developer.
- Must be able to learn on the fly and work in a fast-paced environment.
$138k - $317.8k
...scalable, secure, and user-friendly applications. As we continue to grow, we're looking for a skilled Principal Design Verification Engineer - UAL & PCIe Subsystems to join our dynamic team and contribute to our mission of transforming business processes through...PrincipalLocal areaImmediate startVisa sponsorshipRelocation package$185k - $230k
...Principal Design Verification Engineer California Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions... ...Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the...PrincipalFlexible hoursNight shift- ...bout the Role & Team: s part of the Design Verification Team , you will verify the circuitry that goes inside our chips for both... ...project management and leading a team of verification engineers at a project level. Key Responsibilities: Test Planning...Principal
$142.6k - $206.5k
...specifications, logic/RTL design and implementation, RTL verification, IP FPGA validation and... .... Job Details As Lead DV Engineer focusing on IP Verification... ...(Preferred – Ethernet/PCIe/CXL). Create comprehensive... ...perspectives. Developing IP/subsystem/system level testbench,...SuggestedLocal areaShift work- ...PERSON: We are seeking a high‑impact Design Verification Engineer with strong technical depth, ownership... ...verification efforts across IP, subsystem and SoC levels. You will work in a fast... ...failures across RTL, testbench, interfaces (PCIe/DDR/Ethernet) and system interactions...Suggested
$130k - $160k
...Team Credo is seeking a Design Verification Engineer to ensure the quality and performance of complex digital designs through rigorous verification... ...SV‑UVM testbenches and write test sequences. Verify PCIe subsystems and other interfaces (I2C/I3C/SMBus/CPU/UART/SPI) at...- ...Overview We are seeking a highly motivated Design Verification Engineer to join our Interface IP DV team . In... ...are fully implemented across IP subsystems and interfaces. You will play a... ...Solid understanding of protocols such as PCIe and Ethernet Experience working with...
$92k
...highly talented and self- motivated Design Verification Engineer to join it in advancing the technological... ...test plans for complex IP blocks and subsystems. Test Execution & Debug: Write... ...standard interfaces and protocols (e.g., PCIe, CXL, DDR/LPDDR, Ethernet, AMBA AXI/AHB...Full timeLocal area- We are seeking an experienced Principal Design Verification Engineer to lead verification activities for complex SoC designs. The ideal candidate will architect and develop advanced verification environments, create comprehensive test plans, and collaborate with cross-...Principal
$100k - $120k
...programmable logic. About the Role As a Design Verification Engineer at Altera, you will play a key role... ...Develop and execute block-level and subsystem-level verification plans for complex... ...-speed digital interfaces such as PCIe, Ethernet, DDR, LPDDR, HBM, AXI, AMBA...Full timeLocal areaShift work- ...have assembled a world‑class engineering team and just closed a record... ...funding round. They're hiring a verification engineer to help build their... ...in collaboration with the design team Debug failures, create and... ...with high‑speed protocols (PCIe, SERDES) is desirable. Demonstrated...
- ...Together, we advance your career. The Role As a Senior CPU Design Verification Engineer, you will join a CPU testbench infrastructure team... ...by core verification and debug teams to validate complex subsystems, working closely with globally distributed engineering teams...
- ...based on turnkey, Offshore design center (ODC) or staff augmentation... .../ASIC RTL Design, UVM based verification, Emulation, FPGA based... ...verification plans for IP, subsystem, and SoC-level designs. Design... ...and collaborate with design engineers to resolve issues. Drive functional...
$115k - $268k
...of one of the most exciting semiconductor startups in the industry. We are hiring multiple Design Verification engineers to advance our innovative RISC-V processors and subsystems. Role: Develop and execute verification plans for units and features. Build testbenches,...Contract work- ...POSITION: Senior DV Engineer Who We Are: Quest Global delivers world-class end... ...innovation, but also perpetually driven to design, develop, and test as a trusted... ...and executing end-to-end design verification activities for IP, Subsystem, or SoC-level projects. This role involves...Remote work
- ...system. Job Description We are looking for an experienced design verification engineer to join our SoC team at Baidu’s Sunnyvale office. The successful... .... SoC and IP verification experience on either one aspect (PCIe, Ethernet, HBM, GDDR, DDR, MMU, Cache). Familiar with C/C++...Work at office
- ...Location: San Jose, CA Looking for engineers with strong protocol expertise to verify industry-standard interface IPs such as PCIe, DDR, Ethernet, USB, etc Key Responsibilitie s... ...level failures and debug iss uesWork with design teams to ensure spec complia Required Ski...
- ...that team there's no telling what you could accomplish. Design Verification Engineers at Apple are responsible for verifying the functionality... ...model). You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design and architecture...
$119.8k - $258k
...We are looking for a Design Verification Engineer to support SoC-level verification of advanced high-speed and security IP. This role involves close... ...and UVM Verify UCIe , Ethernet MAC & PCS , and PCIe designs Support PCIe Root of Trust verification, including...Full time- ...seeking a highly motivated and skilled FPGA Verification Engineer to join our dynamic team, working on... ...for the verification of complex FPGA designs, ensuring their functionality, performance... ...I/O design and protocols. Knowledge of PCIe, I2C, SPI, etc. Hands on experience...Contract work
- ...Join to apply for the Design Verification Engineer role at Quest Global Quest Global delivers world‑class end‑to‑end engineering solutions by leveraging... ...‑4. Experience with industry‑standard interfaces such as PCIe (preferably Gen‑6) and NVMe 2.0. Experience coding UVM SoC/...Full time
- ...career. The Role We are looking for an adaptive, self-motivated design verification engineer to join our growing team. As a key contributor, you will be... ...to industry standard protocols such as AXI, AHB, PCIE, DDR etc. will be an advantage Academic Credentials Bachelors...
- ...communication for millions of users worldwide. **Description** As a Design Verification Engineer, you'll be at the center of our silicon design group's... ...test cases that thoroughly validate complex IP and subsystem designs, working closely with multi-functional teams...WorldwideNight shift
- ...Job Title: Interface Design Verification Engineer Location: San Jose, CA Looking for engineers with strong protocol expertise to verify industry-standard interface IPs such as PCIe, DDR, Ethernet, USB, etc. Key Responsibilities Verify interface IPs for protocol compliance...
$130k - $192k
...Semiconductor Recruiting. Functional verification of complex designs. Responsible for verification from... .../ controller sub-systems, Ethernet/PCIE/CXL (Physical coding sublayer)/Serdes... ...Full-time Job function Job function Engineering and Design Industries Semiconductor...Full timeH1b$87.4k - $132k
...Position: Design Verification Engineer (eInfochips Inc) Job Description: What You'll Be Doing: Strong SV/UVM expertise AXI/NOC/Ethernet/PCIe/UCIe Switch expertise is needed CPU ARM/RISC-V with C knowledge Regression & Coverage Closure...Hourly payFull timeTemporary workWork experience placementWork at officeNight shift- ...Design Verification Engineer Location: Santa Clara, CA Duration: Long term Experience: 8-15 Years Key Responsibilities Strong understanding of... ...UVM/SystemVerilog-based verification environments for IP, subsystem, and SoC level testing. Develop directed and random test...
$158.6k - $317.8k
...Position Title: Design Verification Engineer, Principal (Confidential Client) Location: Santa Clara, CA | Onsite Employment Type: Permanent Compensation Salary: $158,600 - $317,800/yr Variable Compensation: Base, bonus, RSUs, Refresher RSUs Position Summary...PrincipalPermanent employment$158.6k - $317.8k
...to create scalable, secure, and user-friendly applications. As we continue to grow, we’re looking for a skilled Principal Design Verification Engineer to join our dynamic team and contribute to our mission of transforming business processes through technology. This...PrincipalFull timeLocal areaImmediate startVisa sponsorshipRelocation package- Job Openings (Mid/Sr/Princ) Verification Design Engineer (UVM) About the job (Mid/Sr/Princ) Verification Design Engineer (UVM) In this role, you will... ...integrating Jenkins, git, JIRA Experience with PCIE, AXI-4, ARM standards beneficial Experience with formal verification...
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to Principal, Design Verification Engineer, UAL and PCIe Subsystems. Be the first to apply!
- principal cloud engineer Santa Clara, CA
- senior principal engineer Santa Clara, CA
- principal infrastructure engineer Santa Clara, CA
- general engineer Santa Clara, CA
- principal application developer Santa Clara, CA
- principal engineer Santa Clara, CA
- director of product engineering Santa Clara, CA
- director data engineering Santa Clara, CA
- data center chief engineer Santa Clara, CA
- chief engineer Santa Clara, CA

