Engineer

Founded in 1996, Logos Technologies LLC (Logos) is a diversified science, engineering and technology company, with headquarters in Northern Virginia. Logos specializes in the fields of advanced sensors, wide-area motion imagery, advanced analytics and processing of large, multisource datasets. We serve multiple government and commercial customers worldwide with wide-area persistent surveillance solutions that are critical to the success of their missions in national defense, public safety, border security, and humanitarian assistance. Job Summary Logos is searching for an FPGA developer to join a multidisciplinary team implementing state-of-the-art image processing and exploitation algorithms for airborne imaging sensor systems and supporting a diverse portfolio of image and signal processing capabilities. The successful candidate will have a strong mathematical background, experience with image processing algorithms, good programming abilities, and a desire to continuously improve and diversify their engineering skills. The position will be supported by appropriate supervision, training, and mentoring. Some travel supporting system design and flight testing will be required. Support existing FPGA Image processing designs with bug fixes, version upgrades, and new features as required Work with System and Algorithm Engineers to partition new applications into components well suited for FPGA implementation Develop new FPGA processing applications through the entire product lifecycle Rigorously test FPGA components with simulation, hardware-in-the-loop and software-in-the-loop integration testing Support field testing events for FPGA based systems Bachelor’s degree from an accredited university in STEM field OR a combination of education and relevant experience. 5+ years of RTL design for FPGAs in VHDL or Verilog, or System Verilog - knowledge of all 3 strongly preferred Experience implementing signal or image processing algorithms into FPGA fabric Experience with high-speed interfaces (ex. PCIe, CoaXPress, 10GbE) and DDR memory controllers Experience with large FPGA designs on Kintex or Virtex devices including challenging timing closure Experience with Xilinx Zynq, Versal, or Alveo system design Matlab and Python programming C++ programming Mapping data processing algorithms to FPGAs using Vitis HLS Implementing AI/ML inference algorithms using Vitis AI Linux device driver development Bit accurate validation of complex designs against algorithm models Must be a U.S. citizen and able to obtain a security clearance Demonstrated analytical problem solving #J-18808-Ljbffr Logos Technologies LLC