SystemVerilog Mixed-Signal Modeling Engineer
Apple Inc.
Apple Inc. in Cupertino, CA, seeks a Mixed-Signal Behavioral Modeling Engineer to model complex custom circuits for system-level verification and performance assessment. You will develop SystemVerilog functional models, analyze data with Python/MATLAB, and assess model accuracy through simulations and formal checks. The role requires collaboration across design and verification teams to enhance methodologies and flows for SoC modeling, with opportunities to contribute to modeling standards and #J-18808-Ljbffr Apple Inc.
Vacancy posted 11 hours ago
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