Design Engineer, HBM DFT

Req ID: JR93231 Design Engineer, HBM DFT Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As part of the Design for Test (DFT) Engineering team, you will contribute to enabling testability and quality for next‑generation High Bandwidth Memory (HBM) products. The team focuses on integrating and validating robust DFT features to support efficient silicon bring‑up and yield ramp, working closely with multi‑functional engineering groups. In this entry‑level role, the DFT Design Engineer supports the design, simulation, and validation of DFT structures within HBM designs. This includes assisting with scan implementation, test integration, and debug activities while learning standard methodologies from experienced engineers and contributing to high‑quality silicon development. Responsibilities Assist with scan insertion and integration of DFT features including test modes, clocks, resets, and clock control mechanisms Support hierarchical DFT integration for multi‑channel or replicated HBM structures and help implement IJTAG and P1500 functionality Run and debug DFT checks such as scan DRC, chain integrity, and X‑propagation issues in test mode Support simulation and debug activities including ATPG readiness, test‑mode sequencing, and MBIST validation for selected memories Collaborate with RTL, DV, PD, and Product/Test Engineering teams to resolve integration issues and participate in build reviews Minimum Qualifications Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or equivalent 0–3 years of experience or relevant internship/research experience in ASIC/SoC design, DFT, or verification Basic understanding of digital design fundamentals including sequential logic, clocks/resets, and timing concepts Experience or familiarity with synthesizable RTL such as SystemVerilog or Verilog Ability to support DFT implementation, validation, and debug tasks in a team environment Preferred Qualifications Basic understanding of DFT concepts such as scan, MBIST, or boundary scan/JTAG Exposure to DFT tools or methodologies through coursework, projects, or internships Familiarity with test access mechanisms, ATPG preparation, or gate‑level simulation concepts Interest in learning advanced DFT practices and high‑speed memory design environments Strong collaboration skills and eagerness to learn from senior engineers Job Profile(s): Semiconductor Design Engineer 1 - Semiconductor Design Engineer 2 Relocation Level: TBD Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time‑off program and paid holidays. Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. #J-18808-Ljbffr Micron Technology, Inc