Senior Hardware Engineer

Description Headquartered in the United States, TP-Link Systems Inc. is a global provider of reliable networking devices and smart home products, consistently ranked as the world’s top provider of Wi-Fi devices. The company is committed to delivering innovative products that enhances people’s lives through faster, more reliable connectivity. With commitment to excellence, TP-Link serves customers in over 170 countries and continues to grow its global footprint. We believe technology changes the world for the better! At TP-Link Systems Inc, we are committed to crafting dependable, high-performance products to connect users worldwide with the wonders of technology. Embracing professionalism, innovation, excellence, and simplicity, we aim to assist our clients in achieving remarkable global performance and enable consumers to enjoy a seamless, effortless lifestyle. Overview TP-Link Systems Inc. is seeking experienced board-level Senior Hardware Design Engineers to join our home networking engineering team. These roles will serve as senior hardware technical owners for consumer network products, conduct needs analysis & design feasibility assessments, be responsible for hardware architecture, schematic design, PCB layout review, board bring‑up, validation, issue debugging, and mass production support. In addition, seniors will mentor junior engineers and contribute to the product direction of our hardware projects. These positions require deep technical expertise in electronics and a proven track record of successful product launches. Key Responsibilities Participate in early‑stage product planning and project initiation by evaluating product requirements, technical feasibility, schedule risks, cost targets, and manufacturability. Define hardware system architecture for network products, including SoC/CPU platform, memory, Ethernet PHY/switch, Wi‑Fi chipset/module, RF front‑end, antenna interface, power architecture, thermal design, and key peripheral interfaces. Conduct technical solution evaluations and trade‑off analysis across performance, cost, reliability, supply availability, manufacturability, and regulatory compliance. Lead key component selection and evaluation, including SoC/CPU, Wi‑Fi chipset or module, Ethernet PHY/switch, DDR, Flash/eMMC, DC/DC converters, LDOs, clocks, connectors, RF front‑end components, and protection devices. Own detailed hardware design, including schematic design, schematic review, PCB layout guidance, BOM preparation, design documentation, and design release. Work closely with PCB layout engineers or design partners to guide component placement, stack‑up, impedance control, power distribution, high‑speed routing, RF layout, antenna placement, and DFM/DFT considerations. Lead board bring‑up, hardware debugging, and system‑level issue analysis for power, clocks, reset, DDR, Ethernet, Wi‑Fi RF interfaces, high‑speed interfaces, thermal behavior, and overall platform functionality. Define and execute hardware validation plans, including functional testing, power validation, signal integrity checks, thermal testing, RF‑related validation, reliability testing, and design verification. Support EVT, DVT, PVT, pilot run, and mass production by resolving hardware issues, supporting factory builds, providing technical guidance, and preparing production‑related documentation. Support regulatory and compliance activities, including FCC, CE/RED, ISED, ESD, EMI/EMC, DFS, RoHS, and reliability requirements. Drive product optimization throughout the lifecycle, including cost reduction, performance improvement, reliability enhancement, manufacturability improvement, and component second‑source qualification. Maintain and support existing products after launch by troubleshooting field issues, analyzing root causes, implementing design changes, and supporting hardware revisions. Participate in design reviews and cross‑functional technical discussions, providing recommendations to improve product design, development process, and engineering quality. Mentor junior engineers, provide technical guidance, and contribute to hardware team training, design standards, checklists, and best practices. Required Qualifications 7+ years of hands‑on hardware design experience, including at least 3 years in a senior engineer or technical lead role. Experience in consumer networking, wireless router, gateway, mesh Wi‑Fi, IoT hub, access point, or similar connected device development. Strong hardware system design experience, including SoC/CPU platforms, DDR, Flash/eMMC, Ethernet PHY/switch, Wi‑Fi RF modules/chipsets, power architecture, thermal design, and peripheral interfaces. Solid knowledge of analog and digital circuit design, including power, reset, clock, protection, interface, and board‑level signal conditioning circuits. Proficient in schematic design, schematic review, PCB layout review, and design documentation using Cadence OrCAD/Allegro, Altium, or similar tools. Strong experience with DC/DC converters, LDOs, power sequencing, power integrity, ripple/noise control, efficiency optimization, and thermal considerations. Hands‑on experience with digital interfaces such as PCIe, USB, RGMII/SGMII, Ethernet PHY interfaces, SPI, I2C, UART, GPIO, and JTAG. Strong hands‑on experience in board bring‑up, debugging, validation, and failure analysis using standard lab equipment. Familiarity with FCC, CE/RED, ISED, UL/ETL, ESD, EMI/EMC, DFS, and reliability testing requirements. Experience supporting full product development from architecture, schematic, layout, EVT/DVT/PVT, pilot run, mass production, to post‑launch issue resolution. Ability to lead technical reviews, drive issue closure, mentor junior engineers, and manage multiple tasks effectively. Preferred Qualifications Experience with Ethernet hardware design, including 1G/2.5G/10G Ethernet interfaces, PHY/switch integration, magnetics, RJ45 circuits, ESD protection, and high‑speed PCB layout considerations. Experience with Wi‑Fi hardware system integration, including Wi‑Fi 6/6E/7 platforms, RF front‑end modules, antenna interfaces, RF coexistence, RF calibration, and wireless performance optimization. Familiarity with RF front‑end and antenna‑related design, including PA/LNA/FEM selection, RF switches, filters, impedance matching, antenna matching, antenna isolation, and OTA performance tuning. Familiarity with mechanical and thermal design constraints, including enclosure impact on RF performance, thermal management, connector placement, antenna placement, and assembly feasibility. Experience working with ODM/JDM partners, certification labs, RF labs, antenna vendors, and key component suppliers. Experience with signal integrity, power integrity, or thermal simulation is a plus. Salary Range $150,000-$185,000 Benefits Fully paid medical, dental, and vision insurance (partial premium coverage for dependents) Employer quarterly contributions to 401k funds 15 days accrued vacation 11 paid holidays Bi‑annual reviews, and annual pay increases Health and wellness benefits, including free gym membership Quarterly team‑building event Equal Employment Opportunity We are dedicated to providing equal employment opportunities to all employees and applicants and we prohibit discrimination and harassment of any kind based on race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state, or local laws. #J-18808-Ljbffr