Post-Silicon Validation and Methodology Engineer

Overview Join NVIDIA, a trailblazer at the forefront of graphics and artificial intelligence performance, efficiency, and innovation. From our roots as a groundbreaking graphics company, we have evolved into a global leader in artificial intelligence, continuously pushing the boundaries to tackle complex challenges across diverse industries. What you will be doing Own bring‑up, validation, qualification, tuning, and productization plans for next‑generation silicon—from first power‑on through PVT sign‑off. Partner across architecture, build, firmware, and software teams to define requirements for power management and clocking features, then drive coverage from pre‑silicon through production. Build and deploy AI‑assisted lab workflows that automate bring‑up telemetry and silicon measurement data evaluation, providing anomaly detection on regression results and debug‑triage tooling. Build the test infrastructure, characterization methodologies, and bring‑up playbooks that shift post‑silicon coverage left and raise velocity across programs. Lead root‑cause analysis on the hardest HW/SW interaction issues—using measurement field, instrumentation judgment, and hypothesis rigor to close them under schedule pressure. Identify where current processes break and redesign them—bring‑up sequencing, debug forums, regression frameworks, and lab metrics that demonstrate improvement. What we need to see BS or MS in Electrical or Computer Engineering (or equivalent experience) plus 5+ years in silicon bring‑up, validation, debug, or productization. Deep fundamentals across digital development, microarchitecture, timing, clocking, power, noise, and control systems; ability to reason across the HW/SW boundary under real lab constraints. Hands‑on lab proficiency with oscilloscopes, logic analyzers, power analyzers, and a keen instinct to select the right instrument during a bring‑up. Strong programming and scripting proficiency in Python, C/C++; experience building lab automation or test infrastructure adopted by other specialists. Proficiency in using AI tools to accelerate silicon validation work—automated analysis of bring‑up logs, regression data, or lab instrumentation output; anomaly detection on silicon measurement datasets; or LLM‑assisted debug triage. Ways to stand out from the crowd Hardware proof of crafting: debug infrastructure you built in the lab, characterization methodologies adopted across programs, and DFT feature specs or in‑system test suites you developed. Proficiency in bring‑up experience with GPU/SoC architecture. Experience crafting or scaling in‑system test and DFT features for production silicon—familiarity with fault models, DPPM, and RAS. Concrete examples of redesigning how a team debugs in the lab, with resulting increases in bring‑up velocity or quality. Compensation and Benefits Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000USD–218,500USD. You will also be eligible for equity and benefits. For more details on our comprehensive benefits package, visit Eligibility and EEO Applications for this job will be accepted at least until June29,2026. NVIDIA is a proud equal‑opportunity employer and does not discriminate on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status, or any other characteristic protected by law. #J-18808-Ljbffr NVIDIA Corporation