SoC Physical Design & Timing Engineer
Apple Inc.
Apple Inc. in Beaverton, Oregon is seeking a skilled physical design engineer to drive partition-level implementation for a complex SOC. You will collaborate with the logic team from early architecture through netlist to GDS2, ensuring timely delivery and signoff. The role requires sub-10nm experience, large SOC work, and robust proficiency with standard EDA tools to meet aggressive die-size and performance goals. #J-18808-Ljbffr Apple Inc.
Vacancy posted 4 days ago
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