Senior Director, Physical Design & Backend Engineering (HPC)

Job Description

Job Description

• Location: Austin, TX (On-site)
• Department: Engineering – Semiconductor / Hardware Engineering
• Employment Type: Full-Time
• Base Salary: $260,000 – $290,000 USD
• Annual Performance Bonus: Target bonus of 30%
• Competitive sign-on bonus and equity package
• Comprehensive benefits package

Visa sponsorship is not available for this position. Applicants must be authorized to work in the United States without current or future sponsorship.

The Opportunity

We are partnering with a global semiconductor leader developing next-generation High-Performance Computing (HPC), automotive, and advanced System-on-Chip (SoC) technologies.

We are seeking an experienced Senior Director, Physical Design & Backend Engineering to lead the global backend engineering organization responsible for delivering complex HPC SoCs and MCUs from RTL through GDSII and tape-out .

This executive leadership role is accountable for end-to-end backend execution across multiple concurrent silicon programs, ensuring successful delivery of high-quality silicon that meets aggressive Power, Performance, and Area (PPA) targets. You will lead globally distributed engineering teams while driving execution excellence, methodology innovation, and organizational scalability across multiple sites.

This is an exceptional opportunity for a semiconductor executive who has progressed from hands-on physical design engineering into executive leadership and has successfully built and led large-scale backend organizations responsible for advanced-node silicon delivery.

What You'll Do1. Lead End-to-End Backend Execution

• Own the complete RTL-to-GDSII implementation flow across multiple concurrent HPC SoC and MCU programs.
• Lead synthesis, floorplanning, place & route (PnR), clock tree synthesis (CTS), timing closure, physical verification, signoff, and tape-out.
• Ensure predictable execution, milestone adherence, and design convergence across all programs.
• Drive first-pass silicon success through disciplined execution and robust backend methodologies.

2. Lead a Global Backend Engineering Organization

• Lead and scale large, globally distributed backend engineering teams across multiple international locations.
• Establish clear accountability, engineering standards, delivery ownership, and performance expectations across sites.
• Build organizational capability to support multiple concurrent SoC and MCU programs.
• Mentor and develop engineering leaders while fostering a culture of technical excellence, accountability, and collaboration.

3. Own Power, Performance & Area (PPA)

• Own delivery against aggressive Power, Performance, and Area (PPA) targets.
• Drive continuous improvements in engineering efficiency, silicon quality, and execution predictability.
• Ensure designs meet signoff criteria, validation requirements, and manufacturing readiness.
• Balance schedule, quality, performance, power, and cost throughout the implementation cycle.

4. Drive Technology & Methodology Excellence

• Enable successful implementation across advanced semiconductor process technologies.
• Drive improvements in backend methodologies, automation, engineering tools, and implementation flows.
• Partner closely with semiconductor foundries, EDA vendors, and internal engineering teams to enhance design outcomes.
• Champion engineering best practices that improve scalability, quality, and execution across multiple engineering sites.

5. Cross-Functional Leadership

Collaborate closely with:

• Architecture
• RTL Design
• Design for Test (DFT)
• Product Engineering
• Methodology
• Program Management
• Silicon Validation

to ensure architectural intent is translated into manufacturable, high-quality silicon while maintaining program schedules and technical objectives.

6. Organizational Execution & Scaling

• Standardize engineering processes and methodologies across global backend teams.
• Develop KPIs, dashboards, and execution metrics that improve predictability and visibility.
• Identify and remove execution bottlenecks affecting delivery schedules or quality.
• Continuously improve engineering productivity while scaling organizational capability.

Scope & Impact

In this role, you will:

• Own backend execution across multiple HPC SoC and MCU programs.
• Lead large, globally distributed engineering organizations.
• Influence silicon delivery schedules, product quality, and overall business outcomes.
• Drive engineering methodology improvements across multiple organizations.
• Shape the long-term scalability and execution capability of the backend engineering organization.

What We're Looking ForEducation

• Master's degree in Electrical Engineering, Computer Engineering, or a related technical discipline preferred.
• Bachelor's degree with extensive semiconductor industry experience will also be considered.

Experience

The ideal candidate will bring:

• 20+ years of semiconductor industry experience with deep expertise in physical design and backend engineering.
• Significant leadership experience at the Director or Senior Director level leading physical design and backend engineering organizations.
• Proven ownership of complete RTL-to-GDSII delivery across multiple concurrent SoC programs.
• Demonstrated success leading large, globally distributed engineering organizations.
• Experience delivering multiple advanced-node tape-outs (5nm, 7nm, 3nm or similar).
• Proven track record delivering complex SoC programs while meeting aggressive schedule, quality, and PPA objectives.
• Experience working across multiple global engineering sites and cultures.

Technical Expertise

Deep expertise in:

• RTL-to-GDSII implementation
• Logic synthesis
• Floorplanning
• Place & Route (PnR)
• Clock Tree Synthesis (CTS)
• Timing closure
• Physical verification
• Design signoff
• Tape-out execution
• Advanced-node implementation methodologies
• SoC and MCU integration
• Power, Performance & Area (PPA) optimization
• Backend methodology development
• Physical implementation automation

Experience collaborating with leading semiconductor foundries and EDA vendors is highly desirable.

Leadership Capabilities

The successful candidate will demonstrate:

• Executive leadership of large, globally distributed engineering organizations.
• Strong execution focus with accountability for delivery outcomes.
• Excellent cross-functional collaboration across architecture, RTL, methodology, product engineering, and executive leadership.
• Data-driven decision-making using engineering metrics and KPIs.
• Ability to build, mentor, and retain world-class engineering teams.
• Proven success driving organizational change and engineering excellence at scale.

Preferred Qualifications

Experience in one or more of the following domains:

• High-Performance Computing (HPC)
• Automotive semiconductor platforms
• Advanced SoCs
• AI accelerators
• Networking silicon
• Mobile processors

Additional experience with:

• Organization-wide methodology development
• Backend flow optimization
• Engineering process standardization
• Multi-site engineering leadership
• Advanced-node silicon implementation

is highly desirable.

Key Success Measures

Success in this role will be measured by your ability to:

• Deliver silicon programs on schedule.
• Achieve aggressive PPA and quality targets.
• Drive first-pass silicon success.
• Improve execution predictability and engineering cycle times.
• Scale global engineering organizations while maintaining quality.
• Develop engineering capability and future technical leaders.
• Drive continuous improvements in backend methodologies and operational excellence.

Why Join?

This is an opportunity to lead one of the industry's most critical backend engineering organizations, with executive ownership of global RTL-to-GDSII execution for next-generation HPC and advanced semiconductor products. You'll shape not only the delivery of complex silicon programs but also the engineering organization, methodologies, and execution model that enable future innovation.

If you're passionate about building world-class engineering organizations and delivering cutting-edge semiconductor products at scale, we'd love to hear from you.

This is an on-site position based in Austin, TX. Candidates willing to relocate are welcome to apply. The company offers a competitive sign-on bonus for successful hires. Please note that relocation assistance is not provided.