CPU Design Verification Lead Design Verification Austin / Santa Clara · Hybrid

Nuvacore is building a ground-up high performance, low-power CPU for next-generation compute workloads. As Design Verification Lead you will lead the team verifying functionality and correctness of the CPU design. You will be responsible for all phases of pre-silicon verification as well as preparing for post-silicon verification.

THE ROLE

As a CPU Design Verification (DV) Lead, you will lead the team that is driving efforts in all the following areas:

Building test environments which target every aspect of the CPU unit, core, or system. Your goal is to find every weakness and flaw in the design using proven verification techniques.

Develop methodology and flows for running simulations and generate all regression results and debug information.

Create test stimulus and relevant coverage metrics at both the unit and top level that fully stresses all corners of the design

Develop golden models and checkers at unit and top level as part of test bench infrastructure

Triage issues and write up detailed bug reports to assist the CPU design team in fixing design issues.

Develop and write detailed test plans for the CPU units, core, or system.

Develop DV methodologies and best practices for the team.

Test and debug the performance of a CPU against the performance model.

Writing tests in ASM, C, C++, or other to test the CPU's correctness according to the test plan

Leverage formal methods and tools as another approach to determining design correctness

Verification and testing of the gate level design of the CPU.

Set up and leverage accelerated test environments such as emulation for high performance design testing

MINIMUM QUALIFICATIONS

BS or MS with 15+ years experience in CPU verification

Understanding in architecture and design practices and the trade-offs in verifying CPU designs.

Experience with one or more of RISC-V, ARM64, or x86 ISA

Strong communication skills and aptitude in debugging and breaking things in CPUs

Experience in C, C++, System Verilog, scripting and other languages such as Perl or Python

Experience managing and mentoring DV engineers

REQUIREMENTS - PREFERRED

Years of expertise in multiple areas of CPU verification including unit level testing, top level testing, emulation, formal verification, coverage metrics

Expertise in one or more areas of CPU microarchitecture including instruction fetch, branch prediction; instruction decoding, scheduling and register renaming; out-of-order execution; integer and floating point execution; load/store execution; prefetching; cache and memory subsystems; translation and memory management; memory coherence and ordering; power and thermal management; and clocking / reset design

Strong background in low power microarchitecture and high-performance verification techniques, with a proven track record of verification and sign-off on multiple CPU programs.