FPGA Design/Verification Engineer

Location: Littleton, CO Salary: $90.00 USD Hourly - $110.00 USD Hourly Description:
Position: FPGA Design/Verification Engineer

Location: Littleton, CO

About the Role

We are seeking a highly motivated ASIC/FPGA Design Engineer to contribute to advanced research and development programs focused on next-generation high-performance systems. In this role, you will participate in the design, development, verification, integration, and testing of complex digital solutions involving FPGA and ASIC technologies.

You will collaborate closely with system architects, hardware engineers, DSP specialists, and cross-functional engineering teams to develop innovative products that leverage high-speed digital processing, communication systems, networking technologies, and system-on-chip (SoC) architectures. The ideal candidate is a passionate problem solver, continuous learner, and technical innovator who enjoys working in a fast-paced engineering environment.

What You'll Do

Design, develop, simulate, verify, and integrate ASIC and FPGA-based solutions for advanced R&D programs.

Implement digital signal processing (DSP), high-speed digital designs, communication interfaces, and SoC architectures on FPGA platforms.

Develop and integrate embedded processing solutions and commercial off-the-shelf (COTS) control platforms.

Create and maintain automation tools and scripts to improve development efficiency, verification coverage, and engineering productivity.

Collaborate with systems engineers, ASIC/FPGA developers, and RF/analog and digital hardware designers to define and implement technical solutions.

Support hardware bring-up, integration, validation, and system-level testing activities.

Contribute to the development of scalable, reliable, and cost-effective engineering solutions for complex products and systems.

Participate in technical reviews and provide recommendations for design improvements and risk mitigation.

Minimum Qualifications

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field, or equivalent practical experience.

Experience with verification and validation of digital ASICs, FPGAs, or mixed-signal ASIC/FPGA designs.

Proficiency in one or more hardware description languages, including VHDL, Verilog, and/or SystemVerilog.

Experience with digital design methodologies, simulation, debugging, and verification techniques.

Strong analytical, problem-solving, and troubleshooting skills.

Ability to work effectively in a collaborative, multidisciplinary engineering environment.

Preferred Qualifications

Experience leading or managing ASIC and/or FPGA development projects.

Knowledge of high-speed communication protocols, networking architectures, and advanced DSP implementations.

Experience with embedded processors and SoC-based FPGA platforms.

Familiarity with automation frameworks, scripting, and workflow optimization tools.

Experience developing aerospace, satellite, or space-based systems.

Understanding of system and hardware requirements for space or mission-critical applications.

Demonstrated ability to learn new technologies quickly and independently.

Strong interpersonal, collaboration, and stakeholder communication skills, including customer-facing experience.

Experience leveraging AI-assisted engineering tools, prompt engineering techniques, or AI-enabled workflows to improve engineering productivity and innovation.

Demonstrated emotional intelligence, leadership potential, and a proactive approach to solving complex technical challenges.

Preferred Characteristics

Curiosity-driven mindset with a passion for innovation.

Excellent written and verbal communication skills.

Ability to thrive in ambiguous and evolving technical environments.

Commitment to engineering excellence, quality, and continuous improvement.

Strong team player with the ability to influence and collaborate across diverse technical disciplines.

Medical, dental, and vision insurance are available to qualified candidates who meet eligibility requirements.
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