Senior Analog IC Design & Verification Engineer (RSU Equity)
Neuralink
Neuralink is seeking an engineer to design analog and mixed-signal ICs, from circuit design to layout and verification, with responsibility for high-performance blocks and IP validation. The role involves planning verification, running simulations, mentoring juniors, and coordinating with internal/external users and vendors. The ideal candidate has a BS in electrical engineering with 5+ years' experience in CMOS analog/mixed-signal design and strong problem-solving skills. #J-18808-Ljbffr Neuralink
Vacancy posted 2 days ago
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