SR DFT Engineer
Sivaltech
Sivaltech Hiring | Senior DFT Engineer/ Lead Bay Area, CA | Full-Time Overview Sivaltech is hiring an experienced Senior DFT Architect / Lead for advanced multi-chip SoC programs in 7nm and below technologies. Skills Required Scan, ATPG, MBIST, Memory Repair, OCC, LBIST
BSD (ACJTAG/DCJTAG)
Mentor/Synopsys DFT tools SDC constraints, RTL & GLS simulation SerDes experience Verilog/SystemVerilog, TCL/Perl/Python Multiple tape-outs in 7nm or below Experience 15+ years in DFT/SoC design Bachelor’s/Master’s in EE or related field Interested candidates can share resumes to View email address on click.appcast.io #J-18808-Ljbffr SivaltechVacancy posted 1 day ago
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