Senior Verification Engineer - Hardware

Senior Verification Engineer – Emulation Division We are looking for a Senior Verification Engineer to join our Emulation division onsite in Santa Clara, CA. What you will be doing: We support multiple emulation environments using the latest emulation techniques (C/C++ DPI Transactors, SV assertions, Coverage, Power Estimation, SpeedBridges, Accelerated UVM Testbenches). Bring up SOCs on emulation, root cause SoC/Processor test failures and emulator environment issues. We have continual collaboration with Design, DV, Power, Silicon Validation, Performance, and Software teams. Work constructively leading emulation vendors to debug issues using various tools. What we need to see: M.S or equivalent experience in Electrical Engineering, Computer Science, Computer Engineering or related field. 3+ years of proven experience. Individual should be proficient in Verilog and/or VHDL, C/C++ and SystemVerilog. Experience with UVM verification environments and scripting with Perl, Python and C/C++ is essential. Be familiar with hierarchical design approach, top-down design, SoC and system level verification. This role is based on-site at our Santa Clara, CA office Our base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5. You will also be eligible for equity and benefits. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. #J-18808-Ljbffr NVIDIA