Entry-Level ASIC Verification Engineer (UVM/RTL) Equity
NVIDIA Gruppe
NVIDIA Gruppe is seeking an entry-level ASIC Verification Engineer in Austin, Texas. This role involves creating a high-impact system-level IP for performance measurement across multiple projects. The ideal candidate will focus on verification methodologies, ensuring high-quality system-level IP design. Responsibilities include designing verification environments, developing test plans, and collaborating with cross-functional teams. Strong skills in System Verilog, Python, and a relevant degree are required, along with a passion for verification. The position offers a competitive salary and equity benefits. #J-18808-Ljbffr NVIDIA Gruppe
$116k - $189.75k
...SOC) group is looking for an entry level ASIC Verification Engineer! In this position you will... ...the corresponding design (RTL). For this position, you should... ...the design. Create the UVM components, sequences, tests... ...will also be eligible for equity and benefits. Equal Opportunity...Employment EquityEntry level- ...Austin is seeking an experienced ASIC Verification Engineer to work on system-level IP projects. Candidates should have... ...with expertise in System Verilog and UVM. This position offers a... ...experience and location, as well as equity and benefits. Join a team that values...Employment Equity
$116k - $189.75k
...NVIDIA is looking for an ASIC Verification Engineer to help verify our... ...and verify generated RTL Ensure code and functional... ...components using SV/UVM methodology Drive coverage... ...at the IP or block level Experience developing... ...also be eligible for equity and benefits. Applications...Employment Equity$136k - $212.75k
...looking for an experienced ASIC Verification Engineer! In this position you... ...to create a high-level and broad impact at NVIDIA... ...corresponding design (RTL). For this position,... ...the design. Create UVM components, sequences,... ...also be eligible for equity and benefits . Applications...Employment Equity$166k - $249k
...07/2026 Category Engineering Hire Type Employee... ...lead in chip design, verification, and IP integration, empowering... ...and highly skilled ASIC Digital Verification... ...SystemVerilog and UVM. Collaborating with... ...for an annual bonus, equity, and other discretionary...Employment EquityRemote work$100k - $166.75k
## ASIC Verification Engineer - New College Grad 2026Applylocations: US, TX, Austin... ...Debussy, GDB), and methodologies (UVM or equivalent).* Your work... ...0,000 USD - 166,750 USD for Level 1, and 116,000 USD - 189,750... ...will also be eligible for equity and benefits.Applications...Employment Equity- ...TX is seeking a Senior Design Verification Engineer to lead verification efforts for ASICs in 5G infrastructure. The... ...involves building transaction-level models, designing UVM testbenches, and driving hardware... ...should have extensive RTL verification experience and strong...
- Ericsson GmbH is looking for an ASIC Design Verification Engineer in Austin, Texas. This position is integral... ...networks, demanding hands-on experience in RTL verification and testbench... ...extensive experience with SystemVerilog and UVM, and will thrive in a hybrid environment...
- ...GmbH in Austin, Texas is seeking a Senior Design Verification Engineer specializing in ASIC IP development. In this position, you will... ...The ideal candidate has a strong background in RTL verification, SystemVerilog, and UVM, with additional knowledge in embedded software...
- NVIDIA Corporation is seeking an ASIC Verification Engineer for its Austin, TX office. This role involves verifying the design and implementation of advanced SoCs and GPUs that drive innovations across various technology fields. The ideal candidate will have a background...Employment EquityWork at office
$84k - $156k
...ll join the Modem Verification (IP Verification)... ...of Silicon Labs’ ASIC IP used in IoT applications... ...cross‑functional engineering teams. Participate... ...: Knowledge of UVM (Universal... ...to verification, RTL development, or semiconductor... ...Roth plan option Equity rewards (RSUs)...Employment EquityInternshipFlexible hours- ...MSIP organization) is looking for an ASIC Design Verification Engineer to join our growing team. We develop leading... ...and directed) using System Verilog/UVM/SystemC Triaging and debugging... ...knowledge and ability to debug System Verilog RTL code using simulation tools...
- ## ASIC Design Verification EngineerAustin,Texas,United StatesFind out... ...Design Verification Engineer** **Austin, Texas****This... ...building transaction-level models that drive... ...designing and building UVM environments from scratch... ...hands-on, in industry RTL verification experience...Temporary workWorldwide
- Etched.ai, Inc. is looking for a Design Verification Engineer to join our Internal IP DV team in Austin, Texas. In this role, you will ensure the... ...robustness and high performance of custom IPs by developing UVM/SystemVerilog testbenches and executing verification plans. Ideal...Work at office
$136k - $264.5k
NVIDIA Corporation is looking for an ASIC Design Engineer to join their System-On-Chip (SOC) group. This role involves defining methodologies, developing RTL, and providing support for system-level IP, ensuring high-quality design through RTL checks and debugging. Ideal...Employment Equity- ...Austin, Texas, is seeking an ASIC Design Engineer to join the System-On-Chip group... .... You will influence system-level IP and performance across... ...methodologies and delivering RTL for optimal performance. The... ...experience and location, as well as equity and additional benefits. #J-...Employment Equity
$200k - $320k
...You will own functional verification of our custom AI... ...work in SystemVerilog and UVM with industry-standard... ...control plane logic Debug RTL mismatches using... ...interfaces) Validate ISA-level correctness — ensure the... ...Additional compensation: equity grant per company...Employment EquityPermanent employmentH1bVisa sponsorshipWork visaNight shift- A leading semiconductor company in Austin is seeking an ASIC Design Verification Engineer to enhance the development of cutting-edge technologies. The... ...abilities, and familiarity with Verilog, System Verilog, and UVM. This role emphasizes teamwork within an innovative...
- ...Austin, Texas is looking for a skilled engineer to define and develop system-level methodologies for performance... ...GPUs. With responsibilities including RTL design and debugging, the ideal... ...to $218,500 for Level 3, along with equity and comprehensive benefits. #J-188...Employment Equity
$220.92k - $311.89k
...innovation in next-generation ASICs for AI applications... .... As a Senior Formal Verification Engineer, you will play a... ...block, subsystem, and SoC levels. Execute verification... ...with architects, RTL developers, and physical... ...techniques. Familiarity with UVM‑based simulation...Local areaShift work$190.61k - $269.1k
## Verification Engineer SeniorApplylocations: US, Texas, Austintime... ...candidate to join our ASIC design verification... ...custom SystemVerilog/UVM development, master industry... ...the required coverage levels and confirm to... ...full chip architects, RTL developers, post-silicon...Local areaImmediate startShift work- Senior Design Verification Engineer — ASIC IP Silicon Verification | 5G Infrastructure... ...- building transaction‑level models that give the team early... ...Architecture - designing and building UVM environments from a clean... ...of hands‑on, in‑industry RTL verification experience at...
- Silicon Laboratories Inc. in Austin, Texas, seeks an experienced verification engineer to join the Modem Verification team. This position entails ensuring the quality and performance of ASIC IP used in IoT applications, contributing significantly to wireless modem designs...
- Correct Designs is looking for a Senior Design Verification Engineer with over 8 years of hardware verification experience, particularly in SystemVerilog and UVM methodologies. The role includes verifying complex design blocks, developing test plans, and requires a solid...Remote jobContract work
- Silicon Labs seeks a Digital Verification Engineer I in Austin, Texas, to verify ASIC IP blocks for IoT modem designs. This role requires a degree in Electrical... ...competitive benefits including flexible PTO, 401k matching, and equity rewards. #J-18808-Ljbffr Silicon LabsEmployment EquityFlexible hours
- ...Texas, is looking for a Senior Modem Design Verification Engineer. This role involves defining verification... ...experience, and expertise in SystemVerilog and UVM. The company offers excellent benefits including flexible PTO, equity rewards, and more. #J-18808-Ljbffr Silicon...Employment EquityFlexible hours
$168k - $264.5k
Senior Verification Engineer - CPU page is loaded## Senior Verification Engineer... ...using SystemVerilog and UVM.* Proficient in one or more... ...Knowledge of CPU and System level architecture/microarchitecture... ...You will also be eligible for equity and .Applications for this...Employment EquityWork experience placement$195.2k - $325k
...Technologies, Inc.Job Area:Engineering Group, Engineering Group > GPU ASICS EngineeringGeneral... ....Graphics formal verification positions involve... ...the Verilog RTL and create models and... ...integration and system-level debugging.System... ...Verification knowledge - UVM/System Verilog...Work experience placementWork from home$191.1k - $258.5k
...skilled and motivated performance analysis engineers to join our diverse team at Arm! Responsibilities Perform RTL performance analysis and verification for SoC Provide technical leadership... ...performance verification plans at SoC-level and performance debug using both...- ...consumer products. You will utilize verification methodologies to ensure hardware... ...has a Bachelor's in Electrical Engineering and experience with SystemVerilog and UVM. This position includes a... ...00, with additional bonuses and equity, plus an opportunity to work in...Employment Equity
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