Senior ASIC Verification Engineer: SystemVerilog & UVM Expert
NVIDIA
A leading technology company in Austin is seeking an experienced ASIC Verification Engineer to work on system-level IP projects. Candidates should have a strong background in verification methodologies, with expertise in System Verilog and UVM. This position offers a competitive salary based on experience and location, as well as equity and benefits. Join a team that values creativity and technology passion. #J-18808-Ljbffr NVIDIA Corporation
Vacancy posted 4 days ago
Similar jobs that could be interesting for youBased on the Senior ASIC Verification Engineer: SystemVerilog & UVM Expert in Austin, TX vacancy
- Etched.ai, Inc. is looking for a Design Verification Engineer to join our Internal IP DV team in Austin, Texas. In this role, you will ensure... ...and high performance of custom IPs by developing UVM/SystemVerilog testbenches and executing verification plans. Ideal candidates...SuggestedWork at office
$136k - $218.5k
NVIDIA is looking for a Senior ASIC Verification Engineer to help verify our global IP! This position offers... ...verification components using SV/UVM methodology Driving coverage-based... ...Experience in pre‑silicon verification (UVM, SystemVerilog), ASIC design/implementation flow,...Senior$136k - $218.5k
...NVIDIA System-On-Chip (SOC) group is looking for an experienced ASIC Verification Engineer! In this position you will have the chance to create a high... ...and carry out the test plan to verify the design. Create UVM components, sequences, tests and scoreboards. Sign off on...Senior$166k - $249k
...Category Engineering Hire Type... ...lead in chip design, verification, and IP integration,... ...experienced and highly skilled ASIC Digital Verification... ...and testbenches using SystemVerilog and UVM. Collaborating with... ...work alongside industry experts and contribute to the...SuggestedRemote workSynopsys
Austin, TX3 days ago- Qualcomm is seeking a highly motivated Hardware Verification Engineer in Austin, Texas. In this role, you will verify complex digital... ...responsibilities include developing test benches using SystemVerilog and UVM, designing verification plans, and collaborating across...Suggested
- ...Senior Verification Engineer On-site | Austin, TX | Full-time | 5 days a week About... ...chip design, VLSI jobs, ASIC verification, RTL jobs AustinPlan and... ...verification environments using SystemVerilog and UVM . Identify, design, and implement...SeniorFull time
Trispoke Managed Services Pvt Ltd
Austin, TX3 days ago - Ericsson GmbH is looking for an ASIC Design Verification Engineer in Austin, Texas. This position is integral to ensuring the reliability of... ...ideal candidate will have extensive experience with SystemVerilog and UVM, and will thrive in a hybrid environment that promotes...
$100k - $166.75k
## ASIC Verification Engineer - New College Grad 2026Applylocations: US, TX, Austin: US, CA, Santa Claratime... ...in Object Oriented Programming with SystemVerilog.* Exposure to design and verification... ...Debussy, GDB), and methodologies (UVM or equivalent).* Your work displays a...- ...propelled by the top engineers in mixed-signal processing... ...and innovative Design Verification Engineer to join a... ...verification domains including UVM-based testbench... ...custom mixed-signal ASICs at block and chip level... ...proficiency with HVLs: SystemVerilog with UVM (or OVM/AVM/...Senior
Cirrus Logic
Austin, TX4 days ago - NVIDIA Gruppe is seeking an entry-level ASIC Verification Engineer in Austin, Texas. This role involves creating a high-impact system-level IP for performance measurement across multiple projects. The ideal candidate will focus on verification methodologies, ensuring high...
- ...Senior Design Verification Engineer Looking for new challenges? Would you like the variety... ...with prior System Verilog UVM experience to work with... ...fabric subsystems, SOC/ASIC products for vision processing... ...~ Strong background in SystemVerilog and UVM verification methodologies...SeniorHourly payContract workTemporary workRemote work
Correct Designs
Austin, TX2 days ago - NVIDIA is seeking a Senior ASIC Verification Engineer based in Austin, Texas. This role involves verifying global IP and collaborating with design teams to ensure proper implementation choices. The successful candidate will develop test plans and verify RTL, playing a key...Senior
- United States Digital Space LLC in Austin, Texas, seeks a Sr. ASIC Design Verification Engineer to develop cutting-edge ASICs for deployment in innovative satellite technologies. The role involves digital ASIC verification, including constructing test plans and executing...Senior
- ...highly qualified candidate to join our ASIC design verification team in a dynamic and forward‑... ...Mentor Others: Inspire and guide junior engineers, fostering their growth and... ...principles and their application in SystemVerilog UVM or other verification methodologies....SeniorLocal areaShift work
$135.9k - $201.13k
...Marvell Custom Solutions Verification Engineer Marvell's semiconductor solutions... ...and implement sophisticated UVM-based verification... ...professional experience in ASIC/SoC verification, OR Master'... ...testbench development using SystemVerilog, with proven experience architecting...SeniorInternshipWork from homeMarvell
Austin, TX2 days ago- ## ASIC Design Verification EngineerAustin,Texas,United StatesFind out how well... ...**ASIC Design Verification Engineer** **Austin, Texas****This is... ...— designing and building UVM environments from scratch,... ...practical experience with SystemVerilog and UVM Proven ability to architect...Temporary workWorldwide
- ...with the ultimate goal of enabling human life on Mars. SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At the company we’re leveraging our... ...Experience with verification methodologies such as UVM/OVM/VMM Strong object‑oriented programming knowledge Strong...SeniorPermanent employmentWorldwideWeekend work
$198.1k - $268k
...technology company in Austin, Texas is seeking experienced Design Verification Engineers to develop innovative verification strategies for their... ...or RTL design and have a strong background in SystemVerilog/UVM. The role offers a competitive salary range of $198,100 to...SeniorFlexible hours- SwiftCruit is seeking an experienced ASIC Design Engineer, Senior to support the design and verification of VLSI test chips in Austin, TX. The ideal candidate will leverage Python to automate EDA workflows and work collaboratively on custom ASIC projects. Responsibilities...Senior
- Advanced Micro Devices (AMD) is seeking a SMTS Silicon Design Engineer in Austin, Texas. This role focuses on research, design, development... ...of relevant experience. Key responsibilities include leading ASIC design, evaluating high-level designs, and collaborating with cross...Senior
- ...communication, we are looking for a Senior Verification Engineer to be driving into the complicated RTL... ...one of the known methodologies (eRM, UVM). Responsibilities Plan and perform... ...verification environments using SystemVerilog and UVM. Identify and write all...
Retym
Austin, TX2 days ago - ...Senior Verification Engineer Austin, Texas, United States About the Job Senior Verification Engineer... ...one of the known methodologies (eRM, UVM, OVM). Responsibilities... ...Build verification environments using SystemVerilog and UVM. Identify and write all types...SeniorWork visa
5 Star Global Recruitment Partners
Austin, TX2 days ago - ...Design Verification Engineer Business Line Description: ~ Advanced Chip Engineering's... ...intelligent stimulus in System Verilog (UVM), random test scenarios, algorithmic... ...productivity improvements. Verilog, SystemVerilog, UVM coding skills required. Verification...SeniorLocal area
NXP Semiconductors N.V.
Austin, TX1 day ago - Silicon Labs in Austin, Texas, is looking for a Senior Modem Design Verification Engineer. This role involves defining verification strategies and... ...5-8 years of relevant experience, and expertise in SystemVerilog and UVM. The company offers excellent benefits including...SeniorFlexible hours
$122.44k - $232.19k
...seeks a skilled professional for a role focused on functional verification of mixed-signal logic components. You'll engage in developing... ...robust designs. The ideal candidate will possess a degree in engineering or computer science, alongside valuable experience in digital...Senior- ...Investments. Responsibilities Plan and perform the verification of digital design blocks according to the design specification and interacting with design engineers. Build verification environments using SystemVerilog and UVM. Identify and write all types of coverage...Senior
$120k - $225k
...We’re hiring experienced Design Verification Engineers to play a key role in developing and verifying... ...development and execution using UVM or other advanced DV methodologies. Creation... ...subsystems. Understanding of Verilog, SystemVerilog, and UVM. Proven track record of first...SeniorLatent AI
Austin, TX1 day ago- Vibotek LLC is seeking a verification expert to ensure digital design blocks meet specifications... ...verification processes using SystemVerilog and UVM, and requires over 10 years of experience... ..., debug functionalities with design engineers, and effective communication skills...Senior
- Silicon Laboratories Inc. is seeking a Senior Modem Design Verification Engineer in Austin, Texas. You will be responsible for ensuring the functional correctness of digital modem designs and collaborate with various teams to develop verification strategies and debug complex...SeniorFlexible hours
$168k - $264.5k
Senior Verification Engineer - CPU page is loaded## Senior Verification Engineer - CPUlocations: US, CA, Santa Clara: US, TX, Austintime... ...scalable constrained-random verification environment using SystemVerilog and UVM.* Proficient in one or more scripting languages like...SeniorWork experience placement
Do you want to receive more vacancies?
Subscribe and receive similar vacancies to Senior ASIC Verification Engineer: SystemVerilog & UVM Expert. Be the first to apply!
Related searches
- system validation engineer Austin, TX
- system verification engineer Austin, TX
- validation consultant Austin, TX
- verification engineer Austin, TX
- verification & validation engineer Austin, TX
- computer system validation engineer Austin, TX
- design verification engineer Austin, TX
- soc design verification engineer Austin, TX
- validation engineer Austin, TX
- validation specialist Austin, TX