Package Assembly Low Yield Analysis Engineer

Job Overview Intel is shaping the future of technology by pushing forward fields like AI, analytics, and cloud‑to‑edge technology. This electrical‑characterization hybrid role is part of the APTD LYA Foundry Labs Network organization and supports back‑end package assembly and wafer‑level assembly sort and test. You will work with a team of engineers and technicians to identify the root cause of in‑line electrical failures and characterize defects and processes to improve yield. Responsibilities Work across team boundaries to achieve strategic objectives and meet program deliverables. Understand program milestones and schedules, translate them into team objectives, and drive execution. Interface with a wide variety of internal teams and external suppliers to improve yield and drive innovation. Project management, package design and/or development, and sustaining support for integrated circuit or semiconductor assemblies and other electronic components. Conduct hands‑on lab work, define data acquisition strategy and data analysis plan, and recommend corrective actions to internal customers. Develop failure analysis techniques, BKMs, and approaches to accelerate failure identification and mechanism understanding. Provide consultation on packaging and assembly problems and manufacturing process improvements. Respond to customer requests or events as they occur. Work effectively across organizational boundaries. Shift Shift7 (back half days) on a compressed work week (back 2, 3, or 4 day workweek starting in the second half of the week). Qualifications Minimum Qualifications Master’s Degree or higher in Materials Science and Engineering, Mechanical Engineering, Chemical Engineering, Electrical Engineering, Chemistry and Physics, or a related field. 3+ months experience with electron microscopy tools or other characterization or fault isolation tools (e.g., SEM, TEM). Preferred Qualifications Prior experience working in a lab environment. Experience with destructive and optical analysis techniques such as manual cross‑sectioning, delayering, SEM, x‑ray microscopy, CSAM, ion milling, TEM, and FIB. Experience performing electrical fault isolation and failure analysis using hand probe, curve trace, auto probing, TDR, EOTPR, EBAC, RIDR, and/or ELITE. Experience with chemical compositional analysis techniques such as EDX, AFM, FTIR, Raman, XRD, and EBSD. Knowledge of package or die mapping software (e.g., Mentor Graphics, SysNav/CadNav, FIELD) and proficiency in SQL scripting and basic statistical analysis tools such as JMP. Ability to communicate findings verbally and through reports to yield engineers, LYA analysts, and other customers. Ability to work collaboratively with diverse individuals in a fast‑paced, technical environment. Ability to work effectively in an ambiguous environment with changing priorities and norms. Benefits Intel offers competitive pay, stock bonuses, and benefit programs that include health, retirement, and vacation. Equal Employment Opportunity All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. #J-18808-Ljbffr Intel Corporation