ASIC Design Verification Engineer I (Full Time) - United States
$107.8k - $157.4kCISCO Systems
Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a Cisco representative may contact you directly if a relevant position opens.Applications accepted until further notice.Meet the Team The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world. Your Impact As an ASIC Engineer, you will play a critical role in developing Cisco’s revolutionary data center solutions. You will collaborate closely with verification engineers, designers, hardware, and othercross-functional teams to verify the ASIC in simulation, in emulation, and during ASIC bring-up to help guarantee seamless integration and optimal performance of Cisco’s hardware platforms. You will: Maintaining existing DV environments and enhancing them Construct test bench including scoreboard, agents, sequencers, and monitors for new blocks Write test plan, develop test cases, debug regression failures and drive to module verification closure Ensuring complete verification coverage through implementation and review of code and functional coverage Minimum Qualifications A Bachelor's degree (completed within the past 3 years or expected to be completed within the next 12 months). Qualifying education and work experience should be in ASIC Design, Design Verification, or a related field. Qualifying education and work experience should be in ASIC Engineering, Verification or a related field. Experience with System Verilog and UVM methodology. Experience with scripting using Perl and/or Python. Preferred Qualifications Experience using UVM and SystemVerilog for ASIC verification and verifying complex blocks and/or clusters within ASICs. Experience with functional coverage and constrained random DV environments. Experience in verifying complex blocks, clusters and top level for SoC. Experience with Veloce/HAPS. Experience building test benches from scratch, including experience in SystemVerilog constraints, structures, and classes. Effective verbal and written communication skills. Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Message to applicants applying to work in the U.S. and/or Canada:Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by CiscoNon-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employeesExempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the nextAdditional paid time away may be requested to deal with critical or emergency issues for family membersOptional 10 paid days per full calendar year to volunteerFor non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:.75% of incentive target for each 1% of revenue attainment up to 50% of quota;1.5% of incentive target for each 1% of attainment between 50% and 75%;1% of incentive target for each 1% of attainment between 75% and 100%; andOnce performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.The applicable full salary ranges for this position, by specific state, are listed below:New York City Metro Area:$107,800.00 - $157,400.00Non-Metro New York state & Washington state: $94,800.00 - $140,000.00* For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.Job SummaryJob number: 2025368Profession: Product and Engineering
$125.7k - $203.1k
...grow. Because full product development—from design to... ...Physical Design Engineer, you will play... ...planning and timing, analyze and... ...should be in ASIC Physical Design... ...with physical verification processes(DRC... ...restricted stock units, which vest following... ...by specific state, are listed...Full timeTemporary workWork experience placementInternshipLocal areaFlexible hours$125.7k - $203.1k
...grow. Because full product development—from design to... ...Physical Design Engineer, you will play... ...planning and timing, analyze and... ...should be in ASIC Physical Design... ...with physical verification processes (DRC... ...restricted stock units, which vest... ...by specific state, are listed below...Full timeTemporary workWork experience placementInternshipLocal areaFlexible hours$167.7k - $245.2k
...unique experience for ASIC engineers by combining the... ...in the ASIC design verification for Cisco high-end... ...blocks/clusters or full chip level for... ...restricted stock units, which vest following... ...periods of time. U.S. employees are... ...position, by specific state ~ NewYorkCity...Full timeTemporary workLocal areaFlexible hours$167.7k - $245.2k
...other grow. Because full product development—from design to qualification... ....Your ImpactAs an ASIC Design Verification Engineer, you will play a critical... ...Simulations with timing annotation on... ...restricted stock units, which vest following... ..., by specific state, are listed below:...Full timeTemporary workLocal areaFlexible hours$198k - $336k
Principal Design Engineer | Micron Technology # Single... ..., California, United States of AmericaApply... ...where cutting‐edge ASIC design meets high... ...works across the full silicon lifecycle... ...closely with verification, physical design,... ...meet performance, timing, and quality goals...Full timeLocal areaImmediate start$168k - $264.5k
...world.NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the design and implementation of the world’s... ...design and implementation of your unit, define the verification scope,... ...US, TX, Austin; US, NC, Durham; US, CO, Boulder; US, WA, SeattleType: Full timeFull time$121.9k - $195k
...you are a first time user, please create... ...are looking for engineers that want to create new designs that can evolve... ...in the ASIC design process;... ...coding, simulation/verification, synthesis, timing... ...protected by federal, state, or local law.... ...Jose Innovation DriveType: Full timeFull timeLocal areaWorldwide$173.61k - $246k
...505 Semiconductor Design Engineer Our vision is to... ...integration and full-chip and block-level... ..., APR and full timing closure as well as... ...language; Digital ASIC design methodology... ...; Design or Verification CAD tools, including... ...applicable federal, state, or local laws....Full timeLocal areaRelocationOverseas$120k - $252k
Sr Design Engineer | Micron TechnologyChange the world through... ...Jose, California, United States of AmericaApply... ...cost, reliability, and time‐to‐market. **Minimum... ...Experience of circuit verification and optimization, layout... ...it could pay for this full-time position is:$120...Full timeLocal areaImmediate start$190k - $246k
## Staff Datapath Design EngineerSan Jose, California, United States of AmericaApply NowFind out... ...analog circuits. Perform verification processes with modeling... ...s degree in Electrical Engineering, Computer Science or a... ...it could pay for this full-time position is $190,000.00...Full timeLocal areaImmediate start$145k - $246k
## Staff Design EngineerSan Jose, California, United States of AmericaApply NowFind out... ...As a Staff Design Engineer at Micron, you will... ...known design and verification practices and communicate... ..., subsystem, and full chip level*... ...pay for this full-time position is:$145,0...Full timeLocal areaImmediate start$176k - $298k
## Principal Design Automation EngineerSan Jose, California, United States of AmericaApply NowFind... ...Principal Design Engineer in the NVE Design... ...into the full chip schematics,... ...subsystem/full-chip verification (analog/mixed-signal... ...measurable cycle-time reduction.* **Collaborate...Full timeLocal areaImmediate start$122.44k - $232.19k
...Performs functional verification of graphics... ..., to ensure design will meet... ...analyze power and timing, and uncover bugs... ..., Computer Engineering or related engineering... ...working on ASIC, CPU or GPU.... ...:Shift 1 (United States of America)Primary... ...Oregon, HillsboroType: Full timeFull timeLocal areaImmediate startShift work$122.44k - $232.19k
...experienced pre-silicon verification engineers who are... ...requires a full-stack verification... ...architecture, design, and software teams... ...to unit- and system-level... ...accelerators or custom ASIC designs.• 3+... ...Shift 1 (United States of America)Primary... ...to split their time between working...Full timeLocal areaImmediate startShift work$164.47k - $311.89k
...is seeking a Senior Design Verification Engineer for the Silicon Chassis... ...components; take full responsibility for functional... ...HireShift:Shift 1 (United States of America)Primary... ...methodologies), Custom ASIC (leveraging existing... ...to split their time between working on-site...Full timeInternshipLocal areaImmediate startShift work- ...We’re seeking engineers who are energized... ...cutting‑edge ASIC design and... ...multiple U.S. states and six countries... ...Collaborate with verification engineers to create... .... Define timing constraints for... ...within the United States. We... ...) for regular full‑time exempt employees...Full timeRemote workFlexible hours
$185k - $240k
...organizations to unlock the full potential of modern... ...for Principal Design Engineers with experience developing... ..., and block-level verification for high performance... ...products for Switch ASIC, Networking applications... ..., participated in a United States military operation...For contractorsImmediate startFlexible hours$249.24k - $348.93k
Sr ASIC Design Engineer - TeraWave### Sr ASIC Design Engineer -... ...Texas: Cupertino, CA: Full time: Posted Yesterday: R7... ...)* Develop verification methodologies and test... ...combination of power unit and trailer that meets... ...protected by federal, state, and/or local law. Blue...Full timePermanent employmentTemporary workLocal areaRemote work$231.44k - $282.88k
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...Role and Impact As a Design Verification Engineering Manager, you will... ...years of experience in ASIC/SoC design and... ...HireShift:Shift 1 (United States of America)Primary Location... ...to split their time between working on-site... ...SummaryLocation: US, California, Santa ClaraType: Full timeFull timeLocal areaImmediate startShift work$186k - $407k
...ever.Principal ASIC Design EngineerAbout the... ...ASIC Design Engineer, you will be the... ...senior team — united around the goal... ...blocks, defining timing constraints, supporting verification, and serving as... ..., and control state machines — in synthesizable... ...with full front-to-back...Full timeFor contractorsLocal areaImmediate start$138k - $197k
...Share ASIC Design Verification Engineer, Machine Learning corporate_fare Google place Sunnyvale, CA, USA... ...cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most... ...is a requirement for all roles unless stated otherwise in the job posting. To all...Worldwide$138k - $197k
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...Junior ASIC Design Verification Engineer, Amazon Leo Job ID: 10560753 | Amazon Kuiper... ...role you will Implement a state of the art verification... ...payments and restricted stock units (RSUs). Final compensation... ...coverage), 401(k) matching, paid time off, and parental leave....Permanent employmentLocal areaFlexible hours$190.2k - $285.4k
...Technologies, Inc. Job Area: Engineering Group, Engineering Group ASICS Engineering General... ...Engineer, you will plan, design, optimize, verify, and... ...10+ years in SOC-level verification with good understanding... ...independently on a Block/Unit of the design. Principal...Work experience placementImmediate startWork from home$175.5k - $195k
...organizations to unlock the full potential of modern... ...a Tech Lead Engineer to drive front-end digital design for high-performance switch ASICs that enable rack-... ...across synthesis, timing, verification, DFT, and physical... ...Authorized to work in the United States. Preferred...Flexible hours$105.65k - $149.15k
...:Job Description: As an IP Design Verification Engineer, you will be responsible for... ...College GradShift:Shift 1 (United States of America)Primary Location... ...employees to split their time between working on-site at... ...Santa Clara; US, Massachusetts, Beaver BrookType: Full timeFull timeInternshipLocal areaImmediate startShift work$122.44k - $200.34k
...every single day to design and manufacture silicon... ...a GPU Design Verification Engineer, you will contribute... ...simulations and analyze power, timing, and functional... ...Experienced HireShift:Shift 1 (United States of America)Primary... ...; US, California, Santa ClaraType: Full timeFull timeInternshipLocal areaImmediate startShift work$105.65k - $149.15k
...is seeking an Entry Level Design Verification Engineer for the Silicon Chassis team... ...College GradShift:Shift 1 (United States of America)Primary Location... ...as work model, location or time type) are subject to change... ...SummaryLocation: US, California, Santa ClaraType: Full timeFull timeWork experience placementInternshipLocal areaImmediate startShift work$175.6k - $263.4k
## CPU Verification Engineer (Multiple Locations)Santa Clara, California, United States of AmericaApply NowFind out how well you match with this jobJob ID: 3087564## **Company... ...CPU Engineering**General Summary:**As a Design Verification Engineer, you will work with Chip...Work from homeFlexible hours
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