High-Speed Memory I/O & DDR Circuit Design Engineer
Dexian
Dexian in Boxborough, MA (Hybrid) is seeking a Memory I/O & Circuit Design Engineer to design high-speed IO circuits and DDR IPs for a 12+ month engagement. You will design/port standard cells, run SPICE simulations, and perform Monte Carlo verification, requiring 5–7 years of schematic design and SPICE experience. BS/MS/PhD in EE or CE preferred; strong scripting, circuit fundamentals, and familiarity with Totem and Nanotime are valued. #J-18808-Ljbffr Dexian
Vacancy posted 1 day ago
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