Memory Subsystem Architect and Design Engineer (Santa Clara)
AMD
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE:This is a leadership role in a dynamic, fast-paced environment focused on advancing cutting-edge network technologies within an AI-driven roadmap. You will lead and architect the memory subsystem of next-generation network hardware.THE PERSON:You possess deep expertise in memory hardware, with hands-on experience across recent generations of DDR5 and DDR4 in both design and debug. You will work closely with ASIC architects to evaluate and select memory controller IP/vendors, collaborate with silicon IP providers to optimize controller configurations, and partner with board designers to establish robust PCB trace design guidelines.KEY RESPONSIBILITIES:Hardware Architecture and Bring up: Lead the architecture and bring up of hardware systems and products involving next-gen memory subsystems.Root Cause Analysis and Corrective Action: Investigate, hand-on debug and resolve next-gen and legacy memory issues, including root cause analysis and corrective action.Collaborate with IP and memory suppliers and vendors to resolve hardware-related issues. Develop and implement corrective actions to prevent future hardware failures. Design and Implementation of Improvements: Identify opportunities for hardware improvements, second sourcing, and cost reductions. Develop and implement test plans to validate hardware improvements. Documentation and Knowledge Transfer: Maintain and update technical documentation, including design documents, user manuals, and technical notes. Collaborate with knowledge management teams to ensure knowledge transfer and retention. Collaboration and Communication: Collaborate with stakeholders, including product management, sales, and marketing, to understand customer requirements and market needs. PREFERRED EXPERIENCE:Extensive experience in hardware engineering, with a focus on next-generation DDR5/DDR4 memory systems.Hands-on expertise in hardware troubleshooting, including component-level isolation, root cause analysis, repair, and rework.Strong foundation in hardware design principles, including circuit design, PCB layout, and system integration.Proficiency with hardware development tools, including CAD platforms (e.g., Altium, Cadence), simulation tools (e.g., SPICE), and scripting languages such as Python.Solid understanding of hardware validation and test methodologies, including debugging and failure analysis.Proficient in using memory test equipment, including logic and protocol analyzers.Excellent communication and collaboration skills, with the ability to work effectively across cross-functional teams.Strong analytical and problem-solving skills, with the ability to diagnose complex technical issues and deliver effective solutions.Demonstrated ability to prioritize tasks, manage multiple projects, and consistently meet deadlines.ACADEMIC CREDENTIALS:Prefers MS in Electrical or Computer EngineeringThis role is not eligible for visa sponsorship.#LI-AG1#LI-HYBRIDBenefits offered are described: AMD benefits at a glance.AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.This posting is for an existing vacancy.
$164.47k - $269.1k
...networking silicon. Our team architects next-generation... ...a Senior SoC Compute/Memory Subsystem Architect to define... ...partnerships across engineering disciplinesCustomer-focused... ...: US, California, Santa ClaraAdditional... ...US, California, Santa Clara; US, Colorado, Fort Collins...SuggestedFull timePart timeLocal areaImmediate startShift work$272k - $431.25k
...a world-class Principal Memory Simulation Architect to design and develop the next-generation... ...on-chip interconnect subsystems.Analyze benchmarks,... ...with multi-disciplinary engineering teams to translate product... ...: US, CA, Santa Clara; US, CA, RemoteType: Full...SuggestedFull timePart timeNight shift$200k - $300k
...Title: Principal ASIC Architect - Memory Systems & AI InterconnectsJob Location: Santa Clara, CA or Boston,... ...Architecture, Memory Subsystems, CXL / NVLink / PCIe... ...architecture and system-level design of memory subsystems... ...other architects and engineers, setting best...SuggestedPart time$191.53k - $286.9k
...the forefront of designing and delivering Marvell... ..., system architects, and Marvell’s internal... ...Senior Principal Memory Architect, you... ...delivering memory subsystem solutions that... ...in-office at our Santa Clara, Irvine or Boise... ...degree in Electrical Engineering, Computer...SuggestedPermanent employmentPart timeInternshipWork at officeRemote workWork from home$184k - $287.5k
...world-class computer architect to contribute to... ...and analyzing memory systems architecture... ...interconnect subsystems.Develop, implement... ...multi-disciplinary engineering teams to... ...network on-chip design.Experience in large... ...SummaryLocation: US, CA, Santa Clara; US, WA,...SuggestedFull timePart time$209.77k - $314.3k
...Your Team, Your ImpactThe Distinguished Engineer, Memory Subsystem CoE is the senior-most technical... ...enablement.Support customer engagements, design reviews, and post‑silicon debug when... ...process prior to employment.#LI-VP1SummaryLocation: Santa Clara, CAType: Full time...Permanent employmentFull timePart timeInternshipWork from home$320k
...a Senior SoC Product Architect, Memory Ecosystem, you will drive... ..., memory controller designers, and board/system... ...optimize SoC + memory subsystem architecture, including... ...see:MS in Electrical Engineering, Computer Engineering... ...: US, CA, Santa ClaraType: Full time...Full timePart time$184k - $287.5k
...NVIDIA's SoC Memory Subsystem team is looking for a strong, senior DRAM firmware engineer to own memory firmware from architecture through... ...-up, and production tuning.Design and implement DRAM initialization... ...by law.SummaryLocation: US, CA, Santa ClaraType: Full time...Full timePart time$184k - $287.5k
...are now looking for a Senior Firmware Engineer for our Memory Subsystem Team! Widely considered to be one of... ...experience in Boot architecture and firmware design.Excellent RTL and digital design... ...protected by law.SummaryLocation: US, CA, Santa ClaraType: Full time...Full timePart time$150k - $250k
...Job Title: Senior ASIC Design EngineerJob Location: Santa Clara, CA or Boston, MACompensation: $150K - $25... ...High-Speed I/O, AI Accelerator, Memory Subsystem DesignPosition OverviewWe are seeking... ...skilled Senior ASIC Design Engineer to lead the design and development...Part time$272k - $431.25k
...Performance Architecture team in Santa Clara, CA, and be part of a... ...Uarch, Midcore CPU Uarch, and Memory Subsystem CPU Uarch.Experience in... ...Bachelor’s degree in Electrical Engineering, Computer Engineering, or... ...of collaboration with architects and microarchitects to achieve...Full timePart time$164.47k - $269.1k
...silicon. Our team architects next-generation... ..., scalable SoC design approaches,... ...I/O/network + memory/accelerators),... ...in Electrical Engineering, Computer Engineering... ..., memory subsystem behavior, performance... ..., California, Santa ClaraAdditional... ..., Santa Clara; US, Colorado,...Full timePart timeLocal areaImmediate startShift work$224k - $356.5k
...a senior SoC/Product Architect to define and drive the... ...across CPU, GPU, memory, and IO teams to resolve... ...— CPU, GPU, memory subsystem, low-power IOs, and power... ...s Degree in Computer Engineering or Electrical... ...SummaryLocation: US, CA, Santa Clara; US, WA, SeattleType:...Full timePart time$272k - $431.25k
...world-class computer architect to contribute to the development... ...and analyzing memory systems architecture... ...architecture, memory systems design with a focus on energy... ...in Electrical Engineering, Computer Science, or... ...SummaryLocation: US, CA, Santa ClaraType: Full time...Full timePart time$168k - $258.75k
...collaborative, and motivated hardware engineers to take our GPU memory subsystem from first silicon power-on to... ...products.Drive review of memory partner’s design limits and test methodology.... ...characteristic protected by law.SummaryLocation: US, CA, Santa ClaraType: Full time...Full timePart time$272k - $431.25k
...world-class Principal DRAM Architect to define, drive, and... ...AI and graphics memory solutions! This role sits... ...the intersection of I/O design, advanced packaging, and... ...architectural decisions.Mentor engineers, lead technical reviews... ...: US, CA, Santa ClaraType: Full time...Full timePart time$100k
...Performance Modeling Architect to help shape the... ..., based out of Santa Clara, CA or Austin, TX... ...core or mid-core design and understand... ...considered) in Computer Engineering, Electrical... ...Understanding of processor subsystems such as... ...prediction, caches, memory hierarchy,...Permanent employmentPart time$190.61k - $361.48k
...ImpactAs a CPU Performance Architect, you will play a... ...'s cutting-edge CPU designs, driving innovation across... ..., and validation engineers during the execution... ...Stations/Execution, Memory Subsystem or Prefetchers and its... ...Folsom, US, California, Santa Clara, US, Oregon,...Full timePart timeLocal areaImmediate startShift work$135.9k - $201.13k
...Senior Staff Digital ASIC Design Engineer at Marvell, you will... .... Our group architects and implements advanced... ...specifications for complex subsystems, high‑speed datapaths... ...processing engines, memory subsystems, and large... ...Irvine, CA; US-CA - Santa Clara - BKH; US-CA - Santa...Permanent employmentFull timePart timeInternshipWork from home$113.92k - $170.6k
..., Your ImpactAs part of the Design Verification Team at Marvell... ...issues.• Verifying boot code and architecting, developing, and maintaining... ...the requirements from the engineering teams into software tools... ...process prior to employment.#LI-SA1SummaryLocation: Santa Clara, CAType:...Permanent employmentPart timeInternshipWork from home$164.47k - $269.1k
...silicon. Our team architects next-generation... ...SoC Network Subsystem Architect to define... ...focuses on designing scalable, programmable... ..., protocol engines, QoS frameworks... ...SoC, compute, memory, SW/FW,... ...US, California, Santa ClaraAdditional... ...California, Santa Clara; US, Oregon, Hillsboro...Full timePart timeLocal areaImmediate startShift work$200k - $250k
...Job Title: Principal Design Verification Engineer - PCIe / High-Speed SoCLocation: Santa Clara, CACompensation: $200... ...for PCIe IP, SerDes subsystems, and high-speed SoC integrations... ...coverage targets.Architect and implement bring-... ...DMA, interrupts, and memory subsystems....Part time$300k - $400k
...Architecture (AI & Memory Systems)Job Location: Santa Clara, CA, or Boston, MACompensation... .../ IPU, DDR Memory Subsystems, AI Systems... ...of Architecture to design our flagship... ...underlying team of SoC architects, system architects,... ...performance modeling engineers.Collaborate closely...Part time$220.92k - $311.89k
...accelerators. If you are an engineer with strong technical... ...a Lead Senior Design Engineer – AI SoC Development... ...SoC IP blocks and subsystems, ensuring they meet stringent... ...:US, California, Santa Clara, US, Texas,... ...the latest advances in memory and programmable solutions...Full timePart timeLocal areaImmediate startShift work$272k - $431.25k
...rapidly outgrow the memory and compute... ...Principal Systems Engineer to define the vision... ...you'll be doing:Design and evolve a unified... ...LLM inference.Architect and implement deep... ...and storage subsystems, and represent the... ...SummaryLocation: US, CA, Santa Clara; US, WA, Remote;...Full timePart timeLocal areaRemote work- ...contribute to the ASIC (chip) design for high-performance network... ...Design teams, and product engineers to achieve first pass silicon... ...RESPONSIBLITIES:Ethernet subsystem design and integrationSwitch... ...Electrical Engineering LOCATION:Santa Clara, CAThis role is not eligible...Part time
- ...your career. THE ROLE: The Graphics Memory Controller (GMC) is an IP that... ...APUs using a flexible controller design as the base for all our IP. We are... ..., conscientious logic design engineer in the Dram Controller IP at AMD's Santa Clara Design Center. You will be working...Part timeFlexible hours
$100k
...seeking talented Physical Design Engineers to implement high-performance... ...based out of Austin,TX or Santa Clara, CA or Fort Collins, CO.We... ...design team, owning a block or subsystem and partnering on tapeout... ...owners.Work closely with architects, RTL designers, and DFT engineers...Permanent employmentPart time$272k - $431.25k
...hardware-software co-design, and communication frameworks... ....This Principal Architect role leads the research... ...and mentoring senior engineers across the organization... ...architecture, memory hierarchies, DMA engines... ...SummaryLocation: US, CA, Santa Clara; US, TX, Austin; US, TX...Full timePart timeRemote work- ...THE ROLE:As a Principal Engineer, you will spearhead... ...through innovative system design and optimization. You... ...microarchitecture, memory hierarchies, and their... ...optimizationsProven track record architecting distributed training... ...: Austin, Tx or Santa Clara, Ca strongly preferred...Part timeRemote work
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