Physical Design Engineer, Timing
$100kTenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.Tenstorrent is looking for a mid- to senior-level Physical Design Engineer with a strong background in static timing analysis (STA). In this role, you will help converge multi-million-gate designs on advanced process nodes and partner with cross-functional teams through final signoff and tapeout.This role is hybrid, based out of Austin, TX, Fort Collins, CO, or Santa Clara, CA.We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.Who You AreA physical design engineer with 8+ years of experience in STA, timing closure, and advanced-node design implementation.Experienced with timing flows, constraints, clocking, CDC, RDC, derates, uncertainties, guardbanding, and final signoff.Skilled in writing and debugging SDC constraints, creating ECOs, developing closure strategies, and analyzing worst-case corners.A strong collaborator and communicator who can drive results across distributed, cross-functional engineering teams.What We NeedDrive timing convergence across blocks, partitions, sections, and top-level designs; generate and validate timing models and publish results.Analyze timing violations, develop and propagate fixes, debug timing-flow issues, and keep execution progressing through tapeout.Develop and validate bottom-up constraints while partnering with Design and DFT teams on methodology updates and closure requirements.Use Python, Perl, and Tcl for automation and flow development; experience with SPICE, PNR, placement, CTS, routing, post-route optimization, DFT, or AI-based automation is a plus.What You Will LearnHow to develop scalable timing models, constraints, and closure strategies across multiple levels of design hierarchy.How clocking, guardbanding, derates, uncertainties, CDC, RDC, and process corners influence timing convergence.How timing, physical design, Design, and DFT methodologies come together to deliver successful tapeouts.How to improve implementation and signoff workflows through scripting, automation, flow development, and emerging AI-enabled solutions.Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.This position requires access to technology that requires a U.S. export license for persons whose most recent country of citizenship or permanent residence is a U.S. EAR Country Groups D:1, E1, or E2 country. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
$136k - $218.5k
...Come join the team and see how you can make a lasting impact on the world.We are now looking for a motivated Senior Physical Design and Timing Engineer to join our dynamic and growing team. If you want to challenge yourself and be a part of something great, join us today...SuggestedFull time$125.7k - $203.1k
...Because full product development—from design to qualification to production—is within... ...the digital world. Your Impact As a Physical Design Engineer, you will play a key role in the full... ...You will optimize floor planning and timing, analyze and improve backend design flows...SuggestedFull timeTemporary workWork experience placementInternshipLocal areaFlexible hours$100k
...of all seniorities.Tenstorrent is seeking a highly skilled Physical Design Engineer to drive the critical Die-to-Die (D2D) Physical Implementation... ..., SerDes) and the physical challenges that come with them (timing, signal integrity, power integrity).Detail-oriented and...SuggestedPermanent employmentRemote work$100k
...contributors of all seniorities.Tenstorrent is looking for a Physical Design CPU Methodology Engineer who defines and drives the implementation methodology,... ...RTL-to-GDS implementation and signoff, including timing closure, power optimization, SI, EM/IR, extraction, and...SuggestedPermanent employmentRemote work$100k
...contributors of all seniorities.Tenstorrent is seeking a talented Physical Design Engineer to implement high-performance blocks for our industry-... ...EE/ECE/CE/CS with proven experience in synthesis, PnR, and timing closure on taped-out designs.Expertise with industry-...SuggestedPermanent employment$140k - $229.8k
Company:Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group > ASICS... ...actively seeking candidates for several physical design engineering positions in our SOC and core... ...(MMMC) clock tree synthesis, routing, timing optimization and closure, RC extraction...Work experience placementWork from home$129.4k - $207k
Please Note:1. If you are a first time user, please create your candidate login account before you apply for a job. (Click... ...before you apply.Job Description:Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions Group at our main campus...Full timeLocal areaRemote work$100k
...seniorities.Tenstorrent is seeking an exceptional Senior-level Physical Design Engineer to drive top-level implementation of our complex AI and CPU... ..., and multi-voltage domain designs.Mastery of timing closure, EM/IR analysis, and physical verification at the chip...Permanent employment$168k - $264.5k
...can make a lasting impact on the world.We are looking for a physical design engineer to be a part of NVIDIA’s physical design (PD) methodology team... ...chips, but to also do it at scale, in the shortest possible time. Your work in physical design methodology directly enables...Full timeRemote work$136k - $218.5k
...intelligence.We are now looking for a motivated Senior ASIC Physical Design Engineer, Netlisting to join our dynamic and growing team. If you... ...etc.Help in all aspects of physical design, such as driving timing convergence, timing constraints generation and management,...Full timeShift work- ...shaping the future. Whether you’re designing next-gen processors, enabling... ...contribute to advanced-node physical design for complex ASIC and... ..., driving implementation, timing closure, signoff, and design... ...CAD, technology, and product engineering teams, you will help deliver...
$138k - $206k
...global leader whose innovative designs are pushing the boundaries of... ...both hardware and software engineers to identify and address the unique... ...policy.What You’ll DoOwn the physical implementation of memory-... ..., and area) convergence and timing closure across multiple process...Work at officeFlexible hoursNight shift$180k - $280k
...builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows... ....About The RoleJoin our close-knit physical design team where you will drive high-impact PPA... ...design tools.BS or MS in Electrical Engineering.Preferred:Knowledge of high speed CPU/GPU...- ...Physical Design Engineer - Location: San Jose OR Irvine, CA Our client develops specialized semiconductor solutions for the edge, building processors... ..., floor planning, power grid creation, place and route, timing analysis, noise analysis, physical verification, EM/IR...Full timeH1bVisa sponsorshipRelocation package
- ## Physical Design Engineer II (IC)Applylocations: US-CA-San Jose, Californiatime type: Full timeposted on: Posted Yesterdayjob requisition id:... ...physical design and implementation, encompassing synthesis, PnR, timing convergence and physical verification.*** **Proficiency in...Hourly payFull timeWork experience placement
$2,000 per month
...would be impossible with GPUs, like real-time video generation models and extremely... ...-tier investors and staffed by leading engineers, Etched is redefining the infrastructure... ...Etched is looking for exceptional Physical Design engineers to join our team. In this role...Work at officeRelocation package- ...Overview: Job Title: Senior Physical Design Engineer Location: San Jose ,CA - Onsite Experience level: 8-10 years Candidate Roles... ...Perform RTL to GDSII tasks such Synthesis, PnR, CTS, Statis Timing Analysis, Physical verification and ensuring clean sign off...
$2,000 per month
...frontier intelligence. We co-design chips, racks, software, and manufacturing... ...and staffed by leading engineers, Etched is redefining the... ...is looking for exceptional Physical Design engineers to join our... ...implementation and verification, drive timing closure and PPA optimization,...Work at officeRelocation package$82.08k - $193.44k
...Santa Clara, CA. About the job you’re considering As a Physical Design Engineer , you will work on complex digital and mixed-signal... ...levels. Collaborate with design, layout, verification, timing, and methodology teams to address implementation challenges...Full timeLocal area$150k - $170k
...eInfochips (An Arrow Company) Semiconductor and Engineering Talent Acquisition Professional !!! Position: Sr. Physical Design Engineer (eInfochips Inc) Experience: 10+... ...closure at both block and top levels, addressing timing, congestion, IR-drop, and physical verification...Full timeTemporary workWork at office$143.8k - $230k
...encompassing 3D and 2.5D interconnects. We are seeking a design engineer with physical layout skills to develop our next generation products with... ...~ company paid holidays ~ paid sick leave ~ vacation time The company follows all applicable laws for Paid Family...Work experience placementLocal areaWorldwide- ...Title : Physical Design Engineer Duration: Full time Location: Mountain View C Job Description: We are looking for a Physical Design Engineer with strong expertise in Place & Route (PnR), Power-Performance-Area (PPA) optimization, and timing convergence...Full time
- ...Job Title: Physical Design Engineer Location: Sunnyvale, CA Note: Highlighted skills are must to have. JD: • 10+ years... ...• Experience in Cadence tools PnR tools like Innovus, Prime time/Tempus etc. • Candidate should be ready to work from Office...Work at office3 days per week
- ...interconnects to scalable photonic engines, Lumilens is unlocking a new... .... Every line of code, every design decision, every breakthrough... ...We are seeking a Senior Physical Design Engineer to join our... ...implementation from RTL to GDSII, drive timing and power closure for ultra‑...
$213k - $287.5k
Annapurna Labs designs silicon and software that accelerates innovation. Customers choose... ...that were unimaginable a short time ago—even yesterday. Our custom chips,... ...technologies. We’re looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies...Local areaFlexible hours$300k - $400k
...Staff ASIC Engineer (Physical Design OR STA)Total package up to $400k (Base up to $200k + bonus + stock)Total first year realistic income $350-... ...opportunities to grow into broader technical ownership over time.Your responsibilities will include:Assisting in the execution...$100k
...for contributors of all seniorities.Tenstorrent is seeking an Physical Design Engineer to lead cross-functional efforts to solve complex physical... ...production flows to improve engineering efficiency, turnaround time, and QoR.Optimize EDA tools and custom CAD flows using data-...Permanent employment$220k - $320k
...About the role Own Full chip and Block timing methodologies and execution to-signoff of... ...our AI accelerator silicon. Work with chip-design and software teams driving DensityAI's AI... ...AI-assisted tool flows to accelerate physical design timing convergence and signoff timelines...Full timeH1bVisa sponsorshipWork visa$130k - $155k
...ultimate goal of enabling human life on Mars. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience... ..., power/ground grid generation, place and route, timing, noise, physical verification, electromigration, voltage drop...Permanent employmentTemporary workWorldwideWeekend work$143.8k - $230k
Please Note:1. If you are a first time user, please create your candidate login account... ...Broadcom's Timing Sign-Off group in Central Engineering is looking for an energetic and self-... ...development and modeling for SOC and 3D/2.5D IC design. This includes complex studies and...Full timeLocal area
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