Silicon Validation Engineer

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Description

APPLE INC has the following available in Austin, Texas. Design and create validation tests for post-silicon environments to target the functionality of processor designs. Collaborate with design and verification engineers to debug/root cause functional issues on silicon. Work closely with Apple's Verification Team to create random test templates and provide random tests in assembly. Develop processor debug tools to facilitate debugging and root cause of functional issues on silicon. Use C/C++ and Python programming for the development of processor debug tools and validation content. Use pre-silicon simulators and analysis of waveforms for debugging of functional issues. Use of C/C++ and Python programming for the development of processor debug tools and validation content. Work with design and architecture teams in the definition and execution of experiments to resolve CPU silicon issues. Use Python scripting to develop infrastructure to automate execution, results collection and reporting of post-silicon validation tests. 40 hours/week.

Minimum Qualifications

• Master’s degree or foreign equivalent in Electrical Engineering, Computer Engineering or related field.
• Experience and/or education must include:
• Utilizing computer architecture concepts to design and develop validation tests.
• Applying knowledge of C/C++ software development concepts to develop validation tests
• Using Python and Shell scripting languages to develop scripts.
• Working in collaboration with design and architecture teams to plan, define, and execute hardware validation plans.
• Using Unix environments for day-to-day work with design and verification tools.
• Utilizing C and ARM assembly code for verification tools development
• Using CPU design and architecture to analyze design fails and collaborate with designers to find root causes
• Utilizing source code management software to collaborate in the development of validation tools

Preferred Qualifications

• N/A

This position is not subject to the application limits.

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