Physical Design Engineer
$155k - $222.6kCisco Systems
The application window is expected to close on: 09/01/2026Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.Meet the TeamThe Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms powering Cisco’s core Switching, Routing, and Wireless products. We design networking hardware for enterprises, service providers, the public sector, and nonprofit organizations worldwide. As part of the team behind Cisco Silicon One—the industry’s only unified silicon architecture spanning top-of-rack switches to web-scale data centers—you’ll help shape Cisco’s groundbreaking solutions by designing, developing, and testing some of the most advanced ASICs in the industry.Your ImpactRTL-to-GDSII implementation, including synthesis, hierarchical floorplanning, place and route, static timing analysis, power integrity, and equivalence checks with a focus on performance and die size optimization.Analyze existing tool flows and methodologies, identifying efficiency gaps and implementing incremental or transformative enhancements.Work closely with RTL, DFT, implementation, EDA vendors, and tool/flow teams to enable best-in-class design methodology.Guide clock tree synthesis (CTS) strategies and provide actionable feedback to the implementation teams.Execute STA setup, convergence methodologies, and sign-off processes across multi-mode, multi-corner scenarios.Complete Timing ECO implementation using Tweaker/Primetime-based flows and contribute to automation for STA methodology.Evaluate multiple timing methodologies/tools across different technologies and design types.Minimum QualificationsBachelors +5 years related experience or Masters +3 years of related experienceExperience with RTL design and logic blocks.Experience working with EDA tools like Innovus, Tempus/Primetime, Redhawk/Voltus or Calibre.Preferred QualificationsExperience with hierarchical design, timing closure, physical convergence, and power integrity analysis.Experience with static timing analysis and concepts, defining timing constraints and exceptions, corners/voltage definitions.Experience with Python, TCL, or Perl programming.Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Message to applicants applying to work in the U.S. and/or Canada:The starting salary range posted for this position is $155,000.00 to $222,600.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by CiscoNon-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employeesExempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the nextAdditional paid time away may be requested to deal with critical or emergency issues for family membersOptional 10 paid days per full calendar year to volunteerFor non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:.75% of incentive target for each 1% of revenue attainment up to 50% of quota;1.5% of incentive target for each 1% of attainment between 50% and 75%;1% of incentive target for each 1% of attainment between 75% and 100%; andOnce performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.The applicable full salary ranges for this position, by specific state, are listed below:New York City Metro Area:$155,000.00 - $256,000.00Non-Metro New York state & Washington state:$138,100.00 - $227,900.00* For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.Job SummaryJob number: 2021076Date posted : 2026-08-04Profession: Product and EngineeringEmployment type: Full time
$100k
...hard problems. We are growing our team and looking for contributors of all seniorities.Tenstorrent is seeking a SoC Physical Design Verification Engineer to drive full-chip signoff and ensure manufacturable, high-quality silicon across advanced technology nodes. You’ll...SuggestedPermanent employment$100k
...solving hard problems. We are growing our team and looking for contributors of all seniorities.Tenstorrent is seeking talented Physical Design Engineers to implement high-performance partitions for an industry-leading AI SOC. You'll own the complete implementation flow from...SuggestedPermanent employment$100k
...hard problems. We are growing our team and looking for contributors of all seniorities.Tenstorrent is seeking a talented Physical Design Engineer to implement high-performance blocks for our industry-leading CPU and AI/ML architectures. You'll own the complete implementation...SuggestedPermanent employment$122.44k - $232.19k
...better brings. We work every single day to design and manufacture silicon products that... ...products that will power the coming era of physical AI systems-beyond the reach of GPUs and... ...silicon team, seeking physical design engineers passionate about innovation at the intersection...SuggestedFull timeInternshipLocal areaImmediate startShift work$100k
...We are growing our team and looking for contributors of all seniorities.Tenstorrent is seeking an exceptional Senior-level Physical Design Engineer to drive top-level implementation of our complex AI and CPU System-on-Chip designs. You'll orchestrate cross-disciplinary...SuggestedPermanent employment- Position:Physical Design Engineer II (eInfochips Inc)Job Description:What You'll Be Doing:Execute synthesis, PNR, and STA for assigned partitions of ASIC chip adhering to strict schedules and design goals.Work closely with architects, RTL designers, and DFT engineers to...Full timeWork at office
$140k - $229.8k
Company:Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group > ASICS EngineeringGeneral Summary:As a leading technology... ...ASIC Team is actively seeking candidates for several physical design engineering positions in our SOC and core design team. As a...Work experience placementWork from home$170k - $220k
Job description: We're looking for a hands-on Physical Design Engineer to support complex SoC projects for our client who designs and delivers advanced System-on-Chip solutions across multiple emerging technologies. They provide high-performance custom solutions for cutting...Local area$168k - $264.5k
...inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.We are looking for a physical design engineer to be a part of NVIDIA’s physical design (PD) methodology team driving innovation in PD across all of NVIDIA's products -...Full timeRemote work$136k - $218.5k
.... This is our life’s work, to amplify human inventiveness and intelligence.We are now looking for a motivated Senior ASIC Physical Design Engineer, Netlisting to join our dynamic and growing team. If you want to challenge yourself and be a part of something great, join...Full timeShift work$165k - $241.4k
...help each other grow. Because full product development—from design to qualification to production—is within our team, we’re... ...to power the future of the digital world. Your ImpactAs a Physical Design Engineer, you will play a key role in the full RTL-to-GDSII implementation...Full timeTemporary workLocal areaFlexible hours$168k - $264.5k
...Come join the team and see how you can make a lasting impact on the world.NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer, PPA Fusion Compiler to join our outstanding Networking Silicon engineering team, developing the industry's best...Full time$141.91k - $200.34k
...Job Description: About the RoleJoin the Design Technology Platform (DTP) organization within... ...will contribute to the development of physical design methodologies and drive full-chip... ...:Master's degree in electrical engineering or related field with minimum of 5 years...Full timeWork experience placementLocal areaImmediate startShift work$168k - $264.5k
We are now looking for a Senior Physical Design Engineer. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing....Full time$136k - $218.5k
...limits of current EDA. NVIDIA's interposer designs are among the most complex in the... ...for them is a small group of high-impact engineers who define how that design process works... ...package design along with interposer and IC physical design.Strong expertise in developing...Full time$183k - $247.6k
...support for customers who require specialized security solutions for their cloud services.We are seeking an experienced Sr. Physical Design STA Engineer to build the next generation of our cloud server platforms. Our success depends on our world-class infrastructure; we’re...Full timeLocal areaFlexible hours- ...Physical Design Lead - Custom Silicon Management Are you a leader and want to apply your engineering background to make big things happen? Can you influence, connect, get results and communicate effectively? Can you deliver on a predictable and dynamic schedule? The Custom...
- ...Physical Design Engineer - Location: San Jose OR Irvine, CA Our client develops specialized semiconductor solutions for the edge, building processors capable of running AI workloads alongside bandwidth-intensive sensors and wireless platforms. Their systems are designed...Full timeH1bVisa sponsorshipRelocation package
$150k - $170k
...70,000.00/yr Direct message the job poster from eInfochips (An Arrow Company) Semiconductor and Engineering Talent Acquisition Professional !!! Position: Sr. Physical Design Engineer (eInfochips Inc) Experience: 10+ years (Relevant) What candidate will Be Doing: Netlist...Full timeTemporary workWork at office$126.8k - $190.9k
...one has solved yet? Do you like changing the game? We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming products that will...Relocation$183k - $247.6k
Annapurna Labs designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve... ...of emergent technologies. We’re looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and architectures,...Local areaFlexible hours$164.47k - $311.89k
Job Details:Job Description: As a Physical Design Timing Engineer, you will play a pivotal role in shaping the performance, power efficiency, and functionality of Intel's cutting-edge System-on-Chip (SoC) designs. Your expertise will directly impact product quality, enabling...Full timeInternshipLocal areaImmediate startShift work$256.05k - $361.48k
...At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers.The Physical Design Integration Engineer performs physical design implementation of custom CPU designs from RTL to GDS to create a design database that is ready...Full timeWork experience placementLocal areaImmediate startFlexible hoursShift work$154.68k - $231.7k
...highly complex SoCs, from architecture and design all the way through layout, packaging,... ...and production ramp up.The SubSystem Physical Implementation Center of Excellence (CoE... ...hardening Working with Senior and Junior engineers to deliver reference floorplan, fully synthesized...Permanent employmentFull timeInternshipWork from homeRelocation$300k - $400k
Staff ASIC Engineer (Physical Design OR STA)Total package up to $400k (Base up to $200k + bonus + stock)Total first year realistic income $350-400kLocations: San Jose, CA, Irvine, CA or Fort Collins, COIntroductionAre you an experienced ASIC engineer with strong expertise...- ...perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: As a Principal CAD PCB Physical Design Engineer in the Network Technology Solutions Group, NTSG, you will be responsible for the PCB physical design and the technology...
$100k
...solving hard problems. We are growing our team and looking for contributors of all seniorities.Tenstorrent is seeking an Physical Design Engineer to lead cross-functional efforts to solve complex physical design challenges and develop end-to-end RTL-to-GDS methodologies...Permanent employment$116k - $166k
Participate in the Physical Design (PD) of blocks for complex TPU chips.Contribute to the design and closure of the subchip and individual... ....Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field,...Worldwide$120k - $250k
...mission is to make the world’s best AI models run as efficiently as allowed by physics, bringing the world years ahead in AI quality and availability. MatX is seeking silicon physical design engineers to join our team as we create best-in-class silicon for high-performance...Full timeWork experience placementLocal areaRemote workMonday to FridayFlexible hours$230k - $280k
...750 megawatts of scale, transforming key workloads with ultra high-speed inference.About The RoleAs a member of our tight knit physical design team, you will be working on the design and analysis of 3D integrated products. This role involves a combination of traditional...
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