Emulation Verification Engineer: SoC & UVM Expert
NVIDIA
NVIDIA Corporation in Santa Clara, CA is seeking a Senior Verification Engineer to join our Emulation division on-site. You will verify SoCs using emulation, collaborate with Design, DV, Power, and Silicon Validation teams, and help debug issues with vendors.
Ideal candidates have MS or equivalent, 3+ years of experience, and proficiency in Verilog, VHDL, SystemVerilog, C/C++, UVM, and Python/Perl. NVIDIA offers equity, competitive salaries, and comprehensive benefits.
#J-18808-Ljbffr- ...Apple Inc. is seeking an experienced Emulation Verification engineer to verify large SoCs by porting designs to Palladium and building end-to-end test plans.... ...emulation-based verification and develop SV/Verilog code and UVM test environments. The role emphasizes low-power...Suggested
- ...professional to handle ASIC design verification for various processing blocks within a System on Chip (SoC). Candidates should hold a B.S. or M.S. degree in Computer Engineering or related field and possess... ...in System Verilog and UVM methodology is essential for this...Suggested
$119.8k - $258k
...company located in Mountain View, CA is seeking a Design Verification Engineer to support SoC-level verification of advanced high-speed and security IP... ...Verification experience and strong skills in SystemVerilog and UVM. This position offers a full-time employment opportunity...SuggestedFull time$181.1k - $318.4k
...A leading technology company in Cupertino is seeking an experienced professional to join its Emulation verification team. The role involves working on verifying large SoCs and collaborating with various teams. Ideal candidates should have at least 10 years of experience...Suggested$120k - $190k
...A leading engineering firm in San Jose is seeking a Design Verification Engineer to verify SoC functional correctness and collaborate with cross-functional teams. The ideal candidate... ...of ARM architecture, and proficiency in UVM and C programming. This full-time, on-site...SuggestedFull time- ...Hewlett Packard Enterprise is seeking a Senior Design Verification Engineer to advance emulation-based verification for complex digital designs. You will define verification plans, build robust UVM/testbench environments, and drive coverage to closure in a hybrid work...Work at office
$2,500 per month
...and staffed by leading engineers, Etched is redefining... ...are seeking a Formal Verification Engineer to join our ASIC... ...IP, interface IP, and SoC subsystems that power... ..., DV engineers, emulation teams, and software/firmware... .... Partner with UVM DV, emulation, software...Contract workWork at officeRelocation package$184.7k - $324.8k
...looking for you to join our design verification team focusing on the creation... ...and support of sophisticated emulation environments. In this highly... ...for verification of large SoCs. The overall work will... ...using Verilog/System Verilog/UVM- Develop random stimulus infrastructure...Relocation$136k - $218.5k
...NVIDIA is seeking an exceptional Senior SoC ASIC Verification Engineer to confirm the functionality of the... ...architects, RTL designers, FPGA, and emulation engineers to ensure verification... ...these: C++, Object-Oriented Programming, UVM, System Verilog. ~ Familiarity with...Full timeRemote workWorldwide$220.92k - $311.89k
...Job Description: Intel’s AI SoC organization is driving innovation... ...cloud. As a Senior Formal Verification Engineer, you will play a critical... ...verification plans and run emulation and system simulation models... ...techniques.• Familiarity with UVM-based simulation...Full timeInternshipLocal areaImmediate startShift work$168k - $264.5k
## Custom SOC IP Verification EngineerApply: US, CA, Santa Clara: US, TX, Austin... ...Custom SOC/IP Verification Engineer to verify the next... ...knowledge of SystemVerilog and UVM, along with a solid grasp of... ...Architecture, SW/FW, Design, Modeling, Emulation, and Post-Silicon Validation...Full timeNight shift$200k - $300k
...looking for talented Design Verification Engineers to help verify and deliver Velaura... ...next generation Physical AI SoC. You will work closely with... ...with SystemVerilog, UVM, C and C++ and coverage driven... ...bring up. Experience with emulation and FPGA prototyping at SoC...Flexible hours- ...Amazon Inc. is seeking a senior verification engineer for Amazon Leo’s SOCs, focusing on satellite communications... ...C/C++ for embedded CPU, FPGA, and emulation platforms. You will collaborate with... ...automated regression workflows using UVM, SystemC, and DPI-C. #J-18808-...
$147k - $220k
...edge applications. About The Role As a SoC Design Verification Engineer, you will contribute to our cutting-... ...activities in simulation and emulation/FPGA when required. Provide technical... ...flows. Proficiency in System Verilog, UVM/OVM and high-level programming languages...Local area- ...Apple Inc. in Cupertino, CA is seeking a Design Verification Engineer to verify functionality and performance of Apple's premier SOCs. You will review design specs, test benches, and work with design, architecture, and software teams to drive verification coverage....
$165k - $195k
...Senior SoC Verification/Validation EngineerSan Jose, CAAstera Labs provides rack-scale AI infrastructure... ...for Senior SoC Verification/Validation Engineer who are passionate about bringing next-... ...SoCs to life on industry-leading emulation platforms. You will play a critical...RelocationFlexible hours$175k - $308.5k
...newest iPhones. As part of the Wireless SOC team, you will have the opportunity to verify... ..., craft highly reusable best-in-class UVM Testbenches, implement effective... ...chip SOC debug architecture. As a Design Verification Engineer on our team, you'll be at the center of...RelocationNight shift- ...Cisco Systems, Inc. is seeking an ASIC Engineer to advance verification of our data center silicon. You will... ...to verify ASICs in simulation and emulation, and assist bring-up for seamless integration... ...verification closure with strong SystemVerilog/UVM skills. #J-18808-Ljbffr...
- ...Services is a leading provider of SoC/ASIC RTL Design, UVM based verification, Emulation, FPGA based validation, DFT, RTL2... ...over 6,000 technology and domain experts in 30+ countries. Prodapt is part... ...ASIC/SoC Verification Engineer with 8+ years hands on experience...
- ...Responsible for ASIC design verification for various processing blocks within a SOC Develop and complete test plans for cache... ...of ASIC-based SoCs using UVM-based environments. Design and implement... ...B.S. or M.S. degree in Computer Engineering, Electrical Engineering, or a...
- ...Intel Corporation is hiring an entry-level engineer to verify and emulate next-generation Xeon server SOCs and IPs. You will collaborate with SoC architects, RTL teams, and post-silicon groups to ensure design correctness and security coverage. The role emphasizes learning...
$91k - $232k
...California is looking for a highly experienced engineer specializing in the verification of complex System-on-Chip (SoC) designs. The ideal candidate will have over 12... ...verification methodologies, including System Verilog and UVM. Key responsibilities include developing...- ...AMD is seeking an adaptive design verification engineer in San Jose to join a SOC team driving high-quality, industry-leading technologies to market. You will... ...global teams. Strong coding in Verilog/SystemVerilog, UVM, and C/C++ is required, with good problem-solving and...
- ...NVIDIA is seeking a Senior Verification Engineer to join our Display Team and help verify the world's leading GPU and SoC display engines. You will own testplan development, verification... ...will define verification scope, develop UVM-based testbenches, and work with C/C++-...
- ...Apple Inc. in Sunnyvale, CA, is seeking a Design Verification Engineer to verify complex Wireless SOCs. You will craft reusable UVM test benches and integrate multiple VIPs for PCIe, memory subsystems, and power-management components. You’ll collaborate across DV teams...
- ...looking for an adaptive, self-motivated design verification engineer to join our growing team. As a key contributor, you will be part of a SOC team to drive and improve AMD's abilities... ...coding skills in Verilog/System Verilog, UVM, C/C++, Scripting languages such as Perl/...
$122.7k - $214.3k
...Wireless SOC Design Verification Engineer Apple’s N1 wireless chip powers connectivity across every new iPhone — and its successor is already taking... ...skills. Preferred Qualifications Familiarity with UVM methodology. Exposure to PCIe, Bus Fabric, NOC, AHB, AXI...RelocationNight shift$293k
...About the Role: As a Distinguished Emulation & FPGA Prototyping Verification Engineer, you will apply extensive,... ...next‑gen AI‑integrated server‑class SoCs. This pivotal role leads significant... ...SoC verification environment. ~ Expert‑level proficiency in debugging complex...Local area- ...service. The company is a pioneer in verification and design services, custom enabling... ...This is a full-time remote role for a UVM Verification Engineer. Using leading AI tools, the UVM Verification... ...is beneficial. Background in ASIC/SoC design flows and knowledge of...Full timeRemote work
$136k - $218.5k
...seeking a motivated and creative Senior Verification Engineer to join our Tegra SoC IP Verification team. Our mission... .... Collaborate with FPGA, emulation, software, and post-silicon teams to... ...Strong background in SystemVerilog, UVM, constrained-random verification, and...
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