Process Improvement Specialist II-Contract Position

Let’s search for your next career at TEL. Use the form below to search our current opportunities and then apply. Please consider joining our Talent Community so that we may continue to engage with you.Job DescriptionPosition SummaryThe WIP Expediter is a critical hands-on role within our R&D 300mm semiconductor fabrication facility. Operating in a manual-handling environment without an Automated Material Handling System (AMHS), this individual is responsible for the physical movement and strategic positioning of TEL (Tokyo Electron Limited) target lots throughout the fab to minimize queue time and maximize throughput. The Expediter acts as the operational interface between the engineering teams and fab floor personnel, ensuring that priority lots are always positioned for rapid processing and that key stakeholders remain informed of WIP status in real time.Key ResponsibilitiesFab Floor Operations (~80% of Time)Physically move TEL target lots from current locations to stockers adjacent to the next planned processing tool, prioritizing queue position to reduce cycle time.Maintain continuous situational awareness of lot locations, tool availability, and processing queues across the 300mm fab floor.Stage lots in advance of scheduled process steps based on tool availability, maintenance windows, and engineering priorities.Monitor lot travelers and work order documentation to ensure accurate tracking of lot status and movement history.Respond rapidly to unplanned situations such as tool downtime, priority changes, or hold conditions by re-routing or repositioning affected lots.Adhere to all fab safety protocols, cleanroom gowning requirements, and wafer handling procedures at all times.Stakeholder Relationship ManagementBuild and maintain strong working relationships with fab operators, tool owners, and process technicians to ensure TEL lots receive favorable run order consideration.Serve as a visible and trusted presence on the fab floor; develop rapport with operations staff to facilitate informal prioritization of TEL lots within dispatch queues.Coordinate with shift supervisors and lead operators to align TEL lot scheduling with shift changeovers, preventive maintenance schedules, and tool qualification windows.Diplomatically advocate for TEL lot priority without disrupting overall fab productivity or violating fab WIP management policies.Engineering Communication & ReportingProvide structured WIP status updates to engineering teams twice per day (e.g., morning and afternoon), covering: lot locations and queue positions, tool downtime events and estimated recovery times, lots requiring immediate action or at risk of missing targets, and any new holds, exceptions, or priority escalations.Maintain a concise daily WIP log capturing lot movements, tool status, operator contacts, and any deviations from the planned sequence.Alert engineering leads in real time of critical holds, unexpected tool outages, or significant queue disruptions affecting TEL priority lots.Participate in daily or weekly WIP review meetings as requested, providing the floor-level perspective on cycle time risks and opportunities.WIP Tracking & DocumentationUtilize the fab's MES (Manufacturing Execution System) or equivalent tracking tools to monitor lot status, update move records, and flag exceptions.Ensure lot travelers, traveler logs, and stocker manifests are accurate and up to date at all times.Identify and escalate systemic bottlenecks or recurring queue issues that may require tool scheduling or capacity interventions.QualificationsRequiredHigh school diploma or equivalent; Associate's or Bachelor's degree in a technical field preferred.1–3 years of experience in a semiconductor fab, cleanroom, or high-volume manufacturing environment.Familiarity with 300mm wafer handling, stocker systems, and manual lot movement protocols.Strong communication and interpersonal skills; ability to build effective working relationships across organizational levels.Comfortable spending the majority of the workday on the fab floor in cleanroom attire.Detail-oriented with the ability to manage multiple lot priorities simultaneously in a fast-paced environment.PreferredExperience in an R&D or low-volume, high-mix fabrication environment.Familiarity with TEL processing equipment or equivalent semiconductor capital equipment.Working knowledge of MES platforms (e.g., SiView, Workstream, PROMIS, Fabworks, or similar).Understanding of BEOL or FEOL process flows in a 300mm facility.Prior experience in a dispatching, logistics, or expediting role within a semiconductor or advanced electronics manufacturing context.Core Competencies:REGFab Floor Presence & Situational AwarenessProactively anticipates bottlenecks and acts before lots miss targets.Relationship BuildingCultivates trust with operators and technicians to gain informal lot priority.Clear & Timely CommunicationDelivers concise, accurate updates; escalates issues quickly and clearly.Adaptability & UrgencyResponds effectively to shifting priorities, tool outages, and unplanned holds.Attention to DetailMaintains accurate lot tracking records and ensures no lot is misplaced or delayed due to documentation error.Working ConditionsCleanroom environment requiring full fab gowning (bunny suit, gloves, mask, booties) for the majority of the workday.Significant physical activity: walking throughout the fab, transporting FOUP carriers, and standing for extended periods.Must be able to lift and carry FOUP carriers and related equipment up to 25 lbs.Exposure to standard semiconductor fab chemicals and processes (with appropriate PPE and safety training provided).May require flexibility to support off-shift coverage during critical production cycles or tool qualifications.Salary Ranges$71,482.06 - $100,991.41Individual pay is determined based on multiple factors, including but not limited to location, experience, skills, job-related knowledge, relevant education, certifications, and/or training. In addition to base salary, we offer (full time regular employees ) a comprehensive benefits package and for certain roles eligibility in our bonus plan and long-term incentives as applicable. The talent advisor can share more details about total compensation for the role in your location during the hiring process.Diversity creates an innovative culture. TEL US is an Equal Employment Opportunity / Affirmative Action employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, age, national origin, protected veteran status, disability status, sexual orientation, gender identity or expression, marital status, genetic information, or any other characteristic protected by law.SubsidiaryTEL TECHNOLOGY CENTER, AMERICA, LLC. #J-18808-Ljbffr Tokyo-Electro