Associate ASIC/FPGA Design or Verification Engineer

Associate ASIC/FPGA Design or Verification Engineer Company: Boeing Space, Intelligence & Weapons Systems. Opportunity to join the Boeing Electronic Products team at El Segundo or Huntington Beach, CA, with an alternative location in Fairfax, VA based on program needs. We develop ASICs and FPGAs for digital beamforming phased arrays, spacecraft, and airplane systems. As an ASIC/FPGA Engineer you will develop state‑of‑the‑art digital ICs/SoCs for critical programs across the enterprise. Position Responsibilities Develop FPGA/ASIC designs supporting design and/or verification teams. Implement FPGA/ASIC with latest design practices and tools from block‑level micro‑architecture through HDL coding and physical design realization. Integrate DSP IP from Boeing’s algorithm team and third‑party IP as needed. Perform static timing analysis, LEC, CDC, linting, and other necessary checks to ensure the design is completed on schedule. Develop functional coverage models and perform code coverage to verify designs in simulation. Create self‑checking and reusable test benches from scratch, applying object‑oriented programming concepts such as inheritance and polymorphism, and leverage UVM to build agents consisting of drivers, sequencers, monitors, predictors, and scoreboards for checking correctness. Support FPGA‑based prototyping and validation depending on program and system requirements and complexity. Validate design through hardware integration test with special test equipment, test‑beds, and higher‑level systems as needed. Position is expected to be 100% onsite; selected candidate must work onsite at one of the listed locations. Basic Qualifications (Required) Ability to obtain a U.S. Secret Clearance (interim or final) and U.S. citizenship. Bachelor of Science in Engineering (Electrical, Mechanical, Aeronautical) or related field, or non‑U.S. equivalent. Experience with ASIC/FPGA design or verification. Experience with register‑transfer language (Verilog, VHDL, SystemVerilog). Preferred Qualifications (Desired) Master’s degree in EE, Computer Engineering/Science or equivalent experience. Experience with hardware emulators, especially Palladium. Proficiency with hardware verification languages: SystemVerilog, SystemVerilog Assertions. Ability to execute test plans. Proficiency with object‑oriented programming concepts: inheritance, polymorphism. Experience developing functional coverage models and achieving high code coverage. Experience with high‑speed SerDes interfaces (JESD204C, PCIe, Ethernet). Proficient in scripting languages: Make, Perl, Python, etc. Experience with revision control systems: SVN, CVS, Git. Proficient in Linux environments. Familiarity with space‑based design techniques and radiation mitigation. Demonstrated history of first‑pass success with ASIC designs. Additional Information Conflict of Interest: Candidate must satisfy Boeing’s COI assessment process. Relocation: Position offers relocation based on candidate eligibility; basic relocation offered for eligible internal candidates. Shift Work: 1st shift. Drug Free Workplace: Employees subject to drug testing as per policy. Security Clearance: U.S. Secret Clearance required. Visa Sponsorship: Not offered. Benefits Competitive base pay and variable compensation opportunities. Health insurance, flexible spending accounts, health savings accounts, retirement savings plans, life and disability insurance. Paid and unpaid time away from work, depending on eligibility and location. Eligibility for various benefit programs; options vary by location and hiring date. Equal Opportunity Employer Boeing is an Equal Opportunity Employer. Employment decisions are made without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, physical or mental disability, genetic factors, military/veteran status or other characteristics protected by law. EEO is the law. EEO Statement We comply with EEO policy and request accommodations. Boeing participates in E‑Verify. #J-18808-Ljbffr Boeing