ASIC/FPGA Verification Engineer (Experienced, Lead, or Senior)

Overview Boeing Space, Intelligence & Weapons Systems seeks multiple ASIC/FPGA Verification Engineers (Experienced, Lead, or Senior) to join the Boeing Electronic Products team. The role involves verifying state‑of‑the‑art digital ASICs and SoCs that support critical aerospace programs. Location El Segundo, Huntington Beach, CA. A Fairfax, VA location may be available based on program needs. Responsibilities Design and implement an ASIC/FPGA verification environment using UVM & SystemVerilog. Develop self‑checking, reusable test benches from the ground up, employing Object‑Oriented Programming principles such as Inheritance and Polymorphism. Build UVM drivers, monitors, predictors, and scoreboards for DUTs. Create functional coverage models and conduct code coverage analysis to ensure thorough verification during simulation. Set up regression tests, collect coverage metrics, and track verification progress over time. Assist with FPGA‑based prototyping and validation based on program and system requirements. Collaborate with cross‑functional teams to align verification strategies with project goals and timelines. This position is expected to be 100% onsite. Basic Qualifications Bachelor’s degree in Engineering, Computer Science, or a related field (or equivalent). 5+ years of experience in ASIC/FPGA verification. Proficiency in SystemVerilog UVM, including SystemVerilog Assertions. Experience implementing test plans and achieving coverage closure. Solid understanding of Object‑Oriented Programming principles. Capability to design self‑checking, reusable testbenches from scratch. Experience with functional coverage models and code coverage. Proficiency with OS and revision control systems (SVN, CVS, Git). Proficiency in Linux environments. Preferred Qualifications 10+ years of related work experience (Lead level) or 15+ years (Senior level). Master’s degree in Electrical Engineering, Computer Engineering, or a related field. Experience with hardware integration and test of ASIC/FPGA designs. Experience with hardware emulators such as Palladium. Experience with high‑speed Serdes interfaces (JESD204C, PCIe, Ethernet). Proficient scripting knowledge (Make, Perl, Python, etc.). Familiarity with space‑based design techniques and radiation mitigation. Demonstrated history of 1st‑pass success with ASIC designs. Additional Requirements Must obtain a U.S. Secret Security Clearance (post‑start). U.S. Citizenship is a condition of employment. First shift work arrangement. Relocation assistance may be offered to eligible candidates. EEO Statement Boeing is an Equal Opportunity Employer. Employment decisions are made without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, disability, or any other protected characteristic, in accordance with applicable laws and regulations. #J-18808-Ljbffr Boeing