Sr Principal ASIC Design Engineer - Terawave

For our client, we are seeking a Sr Principal ASIC Design Engineer - Terawave to join the team of a leader in the Aerospace & Defense space. This role will lead technical initiatives focused on scalable systems, platform reliability, and meaningful business transformation. You will work across engineering, product, operations, and business stakeholders to translate complex requirements into practical technology solutions. The position offers the opportunity to influence architecture, execution quality, and the technology capabilities that enable long-term growth within a Aerospace & Defense environment. Location: San Francisco, CA - US based candidates only, no visa sponsorship available Compensation: $308,051 – $431,270 annually Responsibilities Drive end-to-end design and verification methodologies Write requirements, specifications, and test plans Optimize design performance while minimizing power consumption Perform complex subsystem and SoC verifications Integrate external IP and manage ARM CPU integration Qualifications BS/MS in Electrical Engineering or related field 15+ years of experience in ASIC/SOC design and verification Deep expertise in innovative verification flows Strong knowledge of Verilog/System Verilog and DSP structures Experience in post-silicon bring-up and FPGA flow Benefits Medical, dental, vision insurance Paid parental leave and short/long-term disability support 401(k) with 5% company match Education Support Program for further training Up to four weeks of paid time off and 14 paid holidays Stock options for regular employees Our client is an equal opportunity employer. We encourage you to apply even if you don’t meet every qualification—your background could be exactly what this team needs. #J-18808-Ljbffr Ladders