Senior ASIC Design Verification Engineer, Google Cloud
$156k - $229kGoogle Inc.
link Copy link Google Sunnyvale, CA, USA Mid Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area. Apply link Copy link Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience with design verification. Experience with SystemVerilog. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture. 10 years of experience with industry standard tools, languages and methodologies relevant to the development of silicon-based ICs and chips. Experience with the full verification life cycle. Experience with three or more SoC projects/cycles. About the job In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting‑edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML‑driven systems. In this role, you will use your design and verification expertise to verify complex digital designs. You will collaborate closely with design and verification engineers in active projects and perform exceptional verification. Using your UVM and SystemVerilog coding and problem solving skills, you will build efficient and effective constrained‑random verification environments that exercise designs through their corner‑cases and expose all types of bugs. You will be responsible for the full life cycle of verification, from verification planning to test execution, to collecting and closing coverage. The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. The US base salary range for this full‑time position is $156,000‑$229,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job‑related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google . Responsibilities Plan the verification of complex digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios. Create and enhance constrained‑random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools. Identify and write all types of coverage measures for stimulus and corner‑cases. Debug tests with design engineers to deliver functionally correct design blocks. Close coverage measures to identify verification holes and to show progress towards tape‑out. Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents‑to‑be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire . Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting. To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes. #J-18808-Ljbffr Google Inc.
$163k - $237k
corporate_fare Google place Sunnyvale, CA,... ...degree in Electrical Engineering, Computer Science... ...Computer-aided design (CAD). Experience... ...Automation, Design Verification Test. Preferred qualifications... ...systems. As a Senior Engineer within... ...Googlers, Google Cloud customers, and...GoogleSeniorWorldwide$175k - $215k
...ASIC Design Verification Engineer Waymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver—The World's Most...GoogleFull timeRemote work$163k - $237k
Google Inc. in Sunnyvale is seeking a Senior Physical Design Flow and Methodology Engineer to shape AI/ML hardware acceleration. You will drive TPU technology, contributing to innovations... ..., ensuring high-quality results for all ASIC tapeouts. The ideal candidate has at least...GoogleSeniorWorldwide$138k - $198k
...Bachelor's degree in Electrical Engineering, Computer Engineering,... ...4 years of experience with design verification. Experience in verifying digital... ...using SystemVerilog/UVM for ASICs. Preferred qualifications... ...Unit) technology that powers Google's most demanding AI/ML...GoogleFull timeWorldwide$163k - $237k
corporate_fare Google place Sunnyvale, CA,... ...degree in Electrical Engineering, Computer... ...Understanding of digital design fundamentals, including... ...your design and verification expertise to... ...integration of complex ASIC designs. This is a... ...Googlers, Google Cloud customers, and...GoogleSeniorWorldwide$163k - $237k
Senior Design and Integration Engineer, Cloud TPU Sunnyvale, CA, USA. Level: Mid. Job Summary... ...TPUs). Work closely with Verification, Physical Design,... ...cutting‑edge hardware for Google’s AI workloads. Responsibilities... ..., RTL architecture, and ASIC synthesis flows....GoogleSenior$200k - $300k
...Senior ASIC Design Verification Engineer Join Ethernovia's team to make a lasting impact on the future of packet processor-centric networking solutions to support the real-time sensor, Physical AI, and control data demands of software-defined autonomy across vehicles...SeniorFlexible hours- ...stronger relationships, and the kind of precision that drives great outcomes. Job Summary Your Career As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking next-generation firewall products meet or exceed...SeniorFull timeCasual workWork at officeVisa sponsorshipWork visa
- NVIDIA Gruppe in Santa Clara, California, is seeking a talented engineer to develop CAD software for high-performance chip design and verification. In this role, you’ll work with engineers, develop new methodologies, and co-develop EDA tools to meet NVIDIA's needs. Ideal...Senior
$164.47k - $311.89k
...Job Description: About the Role Intel is seeking a Senior Design Verification Engineer for the Silicon Chassis team. In this role, you will own... ...Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry...SeniorInternshipLocal areaImmediate startShift work- ...Design Verification Engineer, Senior Staff At d-Matrix, we are focused on unleashing the potential of generative... ...a broad class of applications from cloud to edge. The candidate will get to... ...methodologies such as UVM/OVM etc. Hands on ASIC-SoC Design verification tests and...Senior3 days per week
$138k - $198k
corporate_fare Google place Mountain View, CA, USA... ...degree in Electrical Engineering, Computer Science, a related... ...utilizing UVM-based verification environments.... ...applications. Familiarity with ASIC standard interfaces... ...verification of complex digital design blocks by analyzing...Google$116k - $166k
Google Mountain View, CA, USA Overview Be part of a... ...experiences. We research, design, and develop new... ...degree in Electrical Engineering, Computer Science, a related... ...utilizing UVM-based verification environments.... ...applications. Familiarity with ASIC standard interfaces...GoogleWorldwide- NVIDIA Gruppe is seeking a Low Power Design/Verification ASIC Engineer for New College Grad 2026 in Santa Clara, California. This role involves collaboration with architecture, design, and software teams to establish power-management solutions for NVIDIA’s advanced products...
$237k - $296k
...are seeking a high-caliber Sr. Staff Design Verification Engineer to join our ADAS and Inference Silicon... ...Typically 10+ years of industry experience in ASIC design verification. Engineers who... ...checks, staffing services, and cloud services. Rivian may transfer or store...SeniorFull timeContract workTemporary workPart timeLocal areaShift workNight shift- ...technology will revolutionize High-Performance (HPC) and Cloud computing, as well as other industries where low power... ...role: Avicena is seeking a talented and detail-oriented ASIC Design Verification (DV) Engineer to join our chip design team. You'll play a crucial role...
$163k - $237k
Google Inc. in Sunnyvale, CA is seeking a Senior Design and Integration Engineer for Cloud TPU. In this role, you will shape the future of AI/ML hardware by driving the design and optimization of Tensor Processing Units (TPUs). Responsibilities include defining microarchitecture...GoogleSenior$170k - $235k
...actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. ASIC DESIGN VERIFICATION ENGINEER (STARSHIELD) Starshield leverages SpaceX’s Starlink technology and launch capability to support national security...SeniorTemporary workWeekend work$132k - $189k
A leading technology company is seeking an ASIC Formal Verification Engineer in Sunnyvale, CA. This role involves shaping the future of AI/ML hardware... ...bonuses and benefits, with collaboration on groundbreaking innovations in computing power. #J-18808-Ljbffr Google Inc.Google$116k - $166k
Google Inc. is seeking an ASIC Design Verification Engineer in Sunnyvale, California, to shape the future of AI/ML hardware acceleration. You will work with cutting‑edge TPU technology, verifying complex designs and ensuring operational excellence in data centers. This...Google- Advanced Micro Devices is looking for a skilled Design Verification Engineer to join the Network Technologies Solutions Group. This role involves developing... ...architectures and leading verification efforts on complex ASIC designs. The ideal candidate should have expertise in...Senior
$134.39k - $201.3k
...world. Across enterprise, cloud and AI, and carrier... ...reusable components, verification environments, and knowledge... ...of the COE, you will design, verify, and deliver... ...degree in electrical engineering, Computer Engineering,... ...of experience in ASIC/SoC verification ~ Strong...SeniorPermanent employmentInternshipWork from homeShift work- ...Clara, CA headquarters 3 days per week. Design Verification Engineer, Senior Staff Responsible for developing and... ...in‑memory computing architecture for cloud and edge applications. What you will... ...such as UVM/OVM. Hands‑on ASIC‑SoC design verification tests and debug...Senior3 days per week
$153.2k - $229.8k
...Qualcomm is seeking an experienced ASIC Engineer to drive the development of high-performance IP for world-class products in Santa Clara,... ...candidate should have at least 4 years of experience in ASIC design and possess a relevant degree. Responsibilities include defining...Senior- ...SPACE EXPLORATION TECHNOLOGIES CORP (SpaceX) in Sunnyvale, CA is looking for a Sr. SOC/ASIC Physical Design Engineer. The role involves developing cutting-edge silicon for deployment in space and improving physical design methodologies to enhance the Starlink network....Senior
- ...class team and play a critical role in making a global impact - we want to talk to you. What you’ll do: As a Senior ASIC Design Verification Engineer, you will be responsible for verifying critical blocks in the Persimmons inference chiplet that will run the...SeniorFull timeFlexible hours
$112.2k - $242k
A leading tech company in Mountain View is seeking a Design Verification Engineer to architect verification environments for ASIC SoCs. The ideal candidate will have a minimum of 8 years of experience and a deep knowledge of verification processes. Responsibilities include...SeniorFull time$170k - $235k
...United States Digital Space LLC in Sunnyvale, CA is seeking a Sr. RTL Design Engineer to innovate and develop next-generation ASICs for deployment in space and ground infrastructures. The ideal candidate will have over 5 years of experience in RTL implementation and a...Senior- ...Responsibilities • To help develop an ASIC for our automotive and Data Center artificial... ...Architecture definition and modeling, verification test plan and testbench. • Developing... ...or PhD with 8+ years, 5+ years in ASIC design team lead. • Experience in logic...Senior
$106.4k - $172.15k
Palo Alto Networks, Inc. is seeking a Design Verification Engineer for the ASIC team to ensure ASICs meet industry-leading requirements for performance and reliability. This role involves defining verification methodologies and collaborating with engineers across teams...Senior
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