FPGA Engineer

FPGA Engineer

Airbus U.S. Space & Defense, Inc offers advanced solutions to meet the most complex U.S. defense, security, space, and intelligence requirements. Celebrating over 50 years in the US, we remain a trusted government partner, leveraging world-class satellite, laser communication, rotor and fixed wing solutions to help our national security, defense and space focused customers meet their missions. Airbus U.S. looks to employ a commitment driven team, dedicated to enabling our customer's mission success. We are committed to maintaining a diverse and inclusive work environment and a welcoming and engaging staff. With competitive compensation and superior employee benefits, as well as a commitment to fostering individual career growth, Airbus U.S. is the place where top talent wants to work.

Position Summary:

Airbus U.S. is looking for an enthusiastic and creative FPGA Engineer to develop digital logic solutions for our custom hardware on satellites. We're looking for candidates who can bring exceptional skills to accelerate our small-satellite avionics development program.

Position Responsibilities:

The Engineer's primary responsibility will be contributing to FPGA design and development for Airbus U.S.'s next-generation of small-satellite avionics. The Engineer will be heavily involved in the process of FPGA design architecture, initial board bring-up, debugging, testing, requirements verification, and design revisioning across the hardware development life cycle, from prototyping to production. Being at the cutting edge of space technology, we need someone who is eager to learn, grow, and take on new and potentially unfamiliar challenges. There is no shortage of fascinating problems to solve.

The Engineer will report to the program's Lead Principal Engineer.

FPGA Development and Verification ~ 70%

• Utilize design and quality requirements, electrical schematics, and parts datasheets to architect, develop, and document FPGA solutions for control and dataflow applications in small satellite avionics.
• Develop and verify VHDL RTL and top-level block diagram solutions for FPGA SoCs.
• Create FPGA device constraints, perform logic synthesis, execute place and route, and generate FPGA device images in the Vivado and Libero design environments.
• Perform static timing analysis and achieve timing closure, generate and verify compilation reports, and disposition compilation warnings.
• Document design architecture, software interfaces, and compilation results.

Hardware Bring Up and Testing Support ~ 20%

• Support laboratory-based testing, troubleshooting, and performance characterizations of FPGA designs on development kits and custom hardware solutions.
• Develop test scripts and software for embedded Linux and bare-metal platforms to validate hardware function and performance during board bring-up, debugging, and testing.

Additional Responsibilities ~ 10%

• Support hardware architecture development, including reviewing selected FPGA devices for fitness to their intended applications and estimating resource utilization and power dissipation.
• Provide an FPGA-based review of electrical schematics and PCB designs, including pin assignments, clock generation, reset distribution, and high-speed interfaces to memories and transceivers.
• Support make-vs-buy trade studies for licensing third-party IP cores.
• Support board-level and unit-level design reviews.
• Support systems engineering and cross-disciplinary development efforts.

Qualified Experience / Skills / Training:

Education:

• Bachelor's degree in STEM (Science, Technical, Engineering, Math) or related areas.

Experience:

• A minimum of 3 years of experience with FPGAs with a bachelor's degree, or 1 year with a master's degree.
• Academic and/or internship experience with FPGAs may be considered in lieu of industry work experience.

Knowledge, Skills, Demonstrated Capabilities:

• Proficiency in coding structural and behavioral architectures in hardware description languages such as VHDL, Verilog, or System Verilog.
• Familiarity with FPGA design tools from AMD Xilinx Vivado and Microchip Libero, including SoC block diagram integration and third-party IP utilization.
• Experience in digital logic verification via simulation using the Vivado simulator, ModelSim ME, or cocotb.
• Proficiency in the use of Git for source code revision control.
• Experience with programming for hardware verification and validation, including C, C++, and Python.
• Strong understanding of best practices for synchronous logic design.
• Familiarity with standard mitigation techniques for radiation induced single-event upsets is a plus.
• High proficiency in oral and written technical communication.

Travel Required:

• Position requires on-site work on an as-needed basis in the program's electronics development laboratory located in University Park, Pennsylvania.
• Occasional travel to the facilities of Airbus U.S. Space & Defense and the facilities of its subcontractors will also be required.

Eligibility:

• US Citizenship is required.

Clearance:

• Ability to obtain and maintain a U.S. Government security clearance.
• Active U.S. DoD security clearance at Secret or above highly desirable.

Physical Requirements:

• Vision: able to see and read computer screen and other electronic equipment with screens, able to read documents.
• Hearing: able to hear to participate in conversations in person and via teleconference or phone and to hear sounds including safety warnings or alarms.
• Equipment Operation (personal computer, telephone, copies, fax machine, and related office equipment and using electronic identification card to enter building floors and internal doors): able to operate most office and personal electronic equipment.
• Carrying: able to carry documents, electronic equipment and/or supplies up to 40lbs/9kg.
• Lifting: able to lift documents, electronic equipment and/or supplies up to 40lbs/9kg.
• Sitting: able to sit for long periods of time in meetings, working on computer.
• Squatting / Kneeling: able to occasionally squat or kneel to retrieve or replace items shelved on bottom shelves.
• Standing: able to stand for long periods of time.
• Walking: able to walk through office and outside areas including uneven surfaces.

Equal Opportunity:

Airbus provides equal employment opportunities (EEO) to all employees and applicants for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, genetics, pregnancy, marital status, veteran status, or other legally protected status. In addition to federal law requirements, Airbus complies with applicable state and local laws governing nondiscrimination in employment in every location in which the company has facilities. This policy applies to all terms and conditions of employment, including recruiting, hiring, placement, promotion, demotion, termination, layoff, recall, transfer, leaves of absence, compensation, benefits, and training. Airbus expressly prohibits any form of workplace harassment based on race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, genetics, pregnancy, marital status, veteran status or other legally protected status.

As a matter of policy, Airbus does not sponsor visas for US positions unless specified. Only applicants with current work authorization will be considered. Airbus does not offer tenured or guaranteed employment. Employment with Airbus is at will, meaning either the company or the employee can terminate the employment relationship at any time, with or without cause, with or without notice. Airbus reserves the right to revise or change job duties and responsibilities as the need arises. This position description does not constitute a written or implied contract of employment.

By submitting your resume or application you are consenting to Airbus using and storing information about you for monitoring purposes relating to your application or future employment. This information will only be used by Airbus. Airbus is committed to achieving workforce diversity and creating an inclusive working environment. We welcome all applications irrespective of social and cultural background, age, gender, disability, sexual orientation, or religious belief. Airbus is, and always has been, committed to equal opportunities for all. As such, we will never ask for any type of monetary exchange in the frame of a recruitment process. Any impersonation of Airbus to do so should be reported to View email address on click.appcast.io.