Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

Principal PCIe CXL RTL Design Engineer

PLDA

Overview Rambus, a premier chip and silicon IP provider, is seeking to hire a motivated full-time Senior Design engineer to join our PCIe, CXL IP design team. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer. This full-time position will allow the candidate to contribute to the architecture, design of next generation IPs, targeting the latest developments in PCIe and CXL standards. This position will also be involved in prototyping these IPs on cutting edge FPGAs. The candidate will work closely with local teams as well as with multi-cultural, multi-national colleagues. Rambus offers a flexible work environment, embracing a hybrid approach. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work. Benefits include an excellent health insurance, Employee Stock Purchase Plan, an extra day of vacation per quarter, regular team lunches and breakfasts and a great team atmosphere. Responsibilities Contribute to the architecture and micro-architecture of next generation PCIe / CXL / AMBA controller IP Implement these designs in System Verilog Collaborate with the verification team to verify the IPs Participate in prototyping of the IPs in cutting edge FPGAs Qualifications RTL coding: Verilog / System Verilog Master's degree or PHD in Electrical Engineering, Computer Engineering or equivalent. 5+ years of experience with RTL Design Good English skills, communication skills, and willingness to work with an international team.  Additional Desirable skills: Knowledge of PCIe / CXL About Rambus Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems. Rambus offers a competitive compensation package, including base salary, bonus, equity and employee benefits. At Rambus, we are committed to fostering a workplace where every individual is respected, supported, and empowered to succeed. We value a range of perspectives and experiences that contribute to innovation and collaboration. Our goal is to ensure that all team members have equitable access to opportunities, resources, and a sense of belonging. We believe that a culture of fairness and inclusion helps us all do our best work. Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics. Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application. Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services. For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/. #LI-HYBRID#LI-RF1Job SummaryJob ID: 2026-22932Category: Engineering

Vacancy posted 2 days ago
Similar jobs that could be interesting for youBased on the Principal PCIe CXL RTL Design Engineer in Hillsboro, OR vacancy
  • $164.47k - $311.89k

     ...applications. As part of our team, you will help design the next generation of high-performance...  ...skilled individual who is hands-on with RTL implementation for integer, floating...  ...class products.As a CPU RTL Logic Design Engineer your responsibilities will include but are... 
    Suggested
    Full time
    Work experience placement
    Internship
    Local area
    Immediate start
    Shift work

    Intel

    Hillsboro, OR
    1 day ago
  • $105.65k - $200.34k

    Job Details:Job Description: Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries...  ...have a Bachelor’s Degree in Electrical or Computer Engineering or any STEM related education with at least 2+ years of... 
    Suggested
    Full time
    Local area
    Immediate start
    Shift work

    Intel

    Hillsboro, OR
    2 days ago
  • $127.4k - $236.6k

     ...silicon IP provider, is seeking to hire an exceptional Senior/Principal Design Verification Engineer to join our Memory Controller IP team in Hillsboro,...  ...successful candidate will participate in pre-silicon RTL Verification activities related to Memory Controller SoftIP... 
    Principal
    Full time
    Work experience placement
    Work at office
    Local area
    Remote work
    Flexible hours
    3 days per week

    PLDA

    Hillsboro, OR
    1 day ago
  • $127.4k - $236.6k

     ...and silicon IP provider, is seeking to hire an exceptional Principal Logic Design Engineer to join our Silicon IP (SIP) team in Hillsboro, Oregon....  ...Responsibilities Own micro-architecture definition and RTL design for critical blocks such as schedulers, command pipelines... 
    Principal
    Full time
    Work at office
    Remote work
    Flexible hours
    3 days per week

    PLDA

    Hillsboro, OR
    1 day ago
  • $119.8k - $234.7k

     ...MicrosoftOverviewMicrosoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud...  ...and partners worldwide and we are looking for a Senior PCIe IP Design Verification Engineer to help achieve that mission.The Compute... 
    Suggested
    Ongoing contract
    Permanent employment
    Internship
    Work at office
    Local area
    Worldwide
    3 days per week

    Microsoft

    Hillsboro, OR
    1 day ago
  • $108.3k - $201.1k

     ...IP provider, is seeking to hire a motivated full-time Principal Design engineer to join our PCIe IP design team. Candidates will be joining some of the...  ...generations of the IPs Qualifications Required:RTL coding: Verilog / System VerilogMaster's degree or PHD... 
    Principal
    Full time
    Work at office
    Local area
    Remote work
    Flexible hours
    3 days per week

    PLDA

    Hillsboro, OR
    1 day ago
  • $141.91k - $200.34k

     ...Job Description: As a Mixed Signal Logic Design Engineer, you will play a pivotal role in shaping...  ...specifications/designs in RTL and coordinate the work of other junior...  ...of High-Speed I/O protocol stacks (UCIe, PCIe, USB, etc.)Experience with scripting languages... 
    Full time
    Internship
    Local area
    Immediate start
    Shift work

    Intel

    Hillsboro, OR
    2 days ago
  • $141.91k - $200.34k

     .... We work every single day to design and manufacture silicon products...  ....As an IP Verification Engineer, you will be working on UCIe Mixed...  ...coverage, and improve methodologyRun RTL and gate level functional...  ...with UCIe or PCIe or I/OJob Type:Experienced HireShift... 
    Full time
    Work experience placement
    Local area
    Immediate start
    Shift work

    Intel

    Hillsboro, OR
    4 days ago
  • $220.92k - $311.89k

     ...seeking a highly experienced a Director, SoC Design Engineering, to lead the functional verification...  ....- Collaborate with SoC architects, RTL designers, and firmware teams to define...  ...the integration of multiple IPs such as PCIe Gen6/7, DDR5/6, and Ethernet into the SoC... 
    Full time
    Work experience placement
    Local area
    Immediate start
    Worldwide
    Shift work
    Night shift

    Intel

    Hillsboro, OR
    2 days ago
  • $136k - $218.5k

    We are now looking for a Senior Logic Design Engineer!As a member of our CPU Logic Design Team, you will be responsible for the design of CPU...  ..., focusing on such tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure, supporting... 
    Full time

    Nvidia

    Hillsboro, OR
    16 hours ago
  • $136k - $218.5k

     ...the world.We are now looking for a motivated Senior Physical Design and Timing Engineer to join our dynamic and growing team. If you want to...  ...level.Help in driving frontend and backend implementation from RTL to gds2, including synthesis, equivalence checking, floor-planning... 
    Full time

    Nvidia

    Hillsboro, OR
    4 days ago
  • $141.91k - $200.34k

     ...Intel's HIPD team is looking for an experienced senior Logic design engineer to join the rapidly growing UCIE PHY IP for Intel's flagship datacenter...  ...to:- Develops the logic design, register transfer level (RTL) coding, and simulation for IP block.- Participates in the... 
    Full time
    Work experience placement
    Internship
    Local area
    Immediate start
    Shift work

    Intel

    Hillsboro, OR
    16 hours ago
  • $119.8k - $234.7k

     ...Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s...  ...organization within SCHIE is responsible for design, development, manufacturing and packaging...  ..., and area (PPA).Coordinate with CAD, RTL/Design teams/DFT, Architecture team,... 
    Ongoing contract
    Permanent employment
    Work at office
    Local area
    Worldwide
    3 days per week

    Microsoft

    Hillsboro, OR
    2 days ago
  • $122.44k - $232.19k

     ...better brings. We work every single day to design and manufacture silicon products that...  ...our silicon team, seeking physical design engineers passionate about innovation at the intersection...  ...pin placements and keep-outs.• Work with RTL designers to define timing constraints;... 
    Full time
    Internship
    Local area
    Immediate start
    Shift work

    Intel

    Hillsboro, OR
    1 day ago
  • $141.91k - $232.19k

     ...Role and ImpactJoin Intel's distinguished team as an SoC Logic Design Engineer. In this role, you will pioneer the development of cutting-...  ...high-quality logic designs, including Register Transfer Level (RTL) coding and simulations, for innovative SoCs.- Collaborate with... 
    Full time
    Local area
    Immediate start
    Shift work

    Intel

    Hillsboro, OR
    4 days ago
  • $141.91k - $200.34k

     ...industries and improve lives worldwide. We design and manufacture advanced silicon...  ...Collaborates with digital and analog architects, RTL developers, and physical design teams to...  ...Qualifications:Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science,... 
    Full time
    Work experience placement
    Internship
    Local area
    Immediate start
    Worldwide
    Shift work

    Intel

    Hillsboro, OR
    16 hours ago
  • $141.91k - $269.1k

    Job Details:Job Description: Job Description:As a Qubit Control Physical Design Engineer, you will drive or participate in the following:• Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ambitious PPA goals.• Will be responsible... 
    Full time
    Work at office
    Local area
    Immediate start
    Shift work

    Intel

    Hillsboro, OR
    16 hours ago
  • $114.38k - $212.42k

     ...position, you will focus on providing leadership and / or support of product tech transfers to the HTO site. As a Principal / Senior Principal Process Engineer, you will play a crucial role in ensuring the smooth and efficient transfer of products, while maintaining the... 
    Principal
    Full time
    Local area
    Relocation package

    Genentech

    Hillsboro, OR
    2 days ago
  • $141.91k - $200.34k

    Job Details:Job Description: About the RoleJoin the Design Technology Platform (DTP) organization within Intel Foundry as part of the...  ...Qualifications and Experience:Master's degree in electrical engineering or related field with minimum of 5 years of experience in the... 
    Full time
    Work experience placement
    Local area
    Immediate start
    Shift work

    Intel

    Hillsboro, OR
    3 days ago
  • $136k - $218.5k

    We are now looking for a Senior ASIC Engineer! NVIDIA is searching for an outstanding ASIC Engineer to build and implement an MMU for the...  ...’s leading supercomputers!What you’ll be doing:As a Senior Design Engineer at NVIDIA, you will be responsible for the development... 
    Full time
    Worldwide

    Nvidia

    Hillsboro, OR
    3 days ago
  • $141.91k - $269.1k

     ...Job Description: Join a team that defines the heartbeat of next-generation CPUs.We are looking for a Senior Clock Architecture & Design Engineer a pivotal role in developing the clocking architecture for Intel's next-generation flagship CPUs. You'll work at the cutting... 
    Full time
    Local area
    Immediate start
    Worldwide
    Shift work

    Intel

    Hillsboro, OR
    16 hours ago
  • $161.55k - $317.6k

     ...FoundryOrganization Overview: Manufacturing Development Customer Engineering (MDCE) is Intel's newest organization within Intel Foundry...  ...Position Summary: We seek an experienced Senior Staff Collateral Design and DFM Engineer to join our MDCE team and help build a world-... 
    Full time
    Internship
    Local area
    Immediate start
    Shift work

    Intel

    Hillsboro, OR
    16 hours ago
  • $121.68k - $174.44k

     ...LinkedIn and X.Employer: Analog Devices, Inc. Job Title: Senior Engineer, Digital Design EngineeringJob Requisition: 1010.1270.4 / R262589 Job...  ...integration of designs. Perform new digital design using Verilog RTL, Standard cells, and similar approaches as necessary for... 
    Permanent employment
    Full time
    Work at office
    Remote work
    Work from home
    Day shift
    2 days per week

    Analog Devices

    Beaverton, OR
    2 days ago
  • $122.44k - $232.19k

     ...the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital...  ...interview process.Minimum Qualifications:Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, or... 
    Full time
    Internship
    Local area
    Immediate start
    Shift work

    Intel

    Hillsboro, OR
    3 days ago
  • $117.62k - $227.27k

     ...empowering our employees with the tools and opportunities to excel, grow, and make a real impact. If you're a seasoned Silicon Design Automation Engineer with proficiency in Design TFM (Tools, Flows, Methodology) and EDA tools support for Intel's PDK (Process Development Kit... 
    Full time
    Local area
    Immediate start
    Shift work

    Intel

    Hillsboro, OR
    4 days ago
  • $220.92k - $311.89k

    Job Details:Job Description: The Role and ImpactAs a Principal Engineer in Analog Circuit Design, you will be at the forefront of innovation, driving technical...  ...with SerDes fundamentals - Familiarity with UCIe and PCIe specifications- Strong understanding of analog... 
    Principal
    Full time
    Local area
    Immediate start
    Shift work

    Intel

    Hillsboro, OR
    2 days ago
  • $220.92k - $311.89k

     ...Job Description: The Role and ImpactAs a Principal Engineer in AMS IP Architecture, you will play a...  ...delivering scalable, high-performance designs that support Intel's broad portfolio of...  ...Modeling: Architected end-to-end PCIe SerDes models (NRZ/PAM4) in MATLAB/Simulink... 
    Principal
    Full time
    Local area
    Immediate start
    Shift work

    Intel

    Hillsboro, OR
    3 days ago
  • $220.92k - $311.89k

     ...Description: We are seeking a highly experienced and motivated Principal Analog Design Engineer to lead the design and validation of cutting-edge analog...  ...of high-speed communication standards such as PCIe (Gen5/Gen6) and Ethernet (100G/400G/800G).• Solid foundational... 
    Principal
    Full time
    Local area
    Immediate start
    Shift work

    Intel

    Hillsboro, OR
    2 days ago
  • $80.5k - $149.5k

     ...millions of units of life-saving medicine every year to patients around the world.What you'll do:As the the Senior/Principal Asset Engineer you will support the design, operation, control and optimization of manufacturing equipment at HTO. You will serve as the equipment... 
    Principal
    Full time
    Local area
    Relocation

    Genentech

    Hillsboro, OR
    16 hours ago
  • $220.92k - $311.89k

    Job Details:Job Description: The Role and Impact As a Physical Design Timing Engineer, you will play a critical role in delivering Intel's next-generation System-on-Chip (SoC) products. In this position, you will focus on ensuring optimal timing, power efficiency, and... 
    Full time
    Local area
    Immediate start
    Shift work

    Intel

    Hillsboro, OR
    2 days ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to Principal PCIe CXL RTL Design Engineer. Be the first to apply!