Senior Silicon Engineer

Microsoft Silicon Cloud Hardware and Infrastructure Engineering (SCHIE) is the team behind Microsofts expanding Cloud Infrastructure and responsible for powering Microsofts Intelligent Cloud mission. SCHIE delivers the core infrastructure and foundational technologies for Microsofts over 200 online businesses including Bing MSN Office 365 Xbox Live Teams OneDrive and the Microsoft Azure platform globally with our server and data center infrastructure security and compliance operations globalization and manageability solutions. Our focus is on smart growth high efficiency and delivering a trusted experience to customers and partners worldwide and we are looking for a Senior Silicon Engineer to help achieve that mission.

As Microsofts cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time in high volume with high quality and lowest cost is of paramount importance. To achieve this goal the Interface IP Team team is instrumental in defining and delivering operational measures of success for hardware manufacturing improving the planning process quality delivery scale and sustainability related to Microsoft cloud hardware. We are looking for a Senior Silicon Engineer with a dedicated passion for customer focused solutions insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.

We are looking for a Senior Silicon Engineer to join the team.

• Design and verify analog circuit components for custom SerDes interface IP (e.g. PLL Clock Distribution Transmit and Receive Macros).
• Mixed Signal Validation of blocks to validate calibration functionality end-to-end.
• Generate timing models for analog interfaces to digital blocks.
• Simulation post-layout verification & co-ordination with layout designers and other engineers on the macro.
• Co-ordinate with designers to ensure behavioral model accuracy.

Required Qualifications:

• Doctorate in Electrical Engineering Computer Engineering Computer Science or related field AND 1 year(s) technical engineering experience OR Masters Degree in Electrical Engineering Computer Engineering Computer Science or related field AND 4 years technical engineering experience OR Bachelors Degree in Electrical Engineering Computer Engineering Computer Science or related field AND 5 years technical engineering experience OR equivalent experience.

Other Requirements:

• Ability to meet Microsoft customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
• This role will require access to information that is controlled for export under export control regulations potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations the EU Dual Use Regulation and/or other export control a condition of employment the successful candidate will be requiredto provide either proof of their country of citizenship or proof of their US. residency or other protected status(e.g. under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled meet this legal requirement and as a condition of employment the successful candidates citizenship will be verified with a valid passport. Lawful permanent residents refugees and asylees may verify status using other documents where applicable.

Preferred Qualifications:

• MS in Electrical Engineering or PhD in Electrical Engineering.
• 7 years with MS EE and 5 years with PhD in Electrical Engineering.
• Experience with deep sub-micron nodes and hands on layout optimization experience.
• Ability to review DV waveforms and debug calibration related issues.
• Experienced with behavioural modeling (System Verilog LEC).
• Post silicon validation.
• Python Perl & other scripting languages for post silicon validation.
• Analog Behavioural Modeling of PLL Components.

#SCHIE

Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119800 - $234700 per year. There is a different range applicable to specific work locations within the San Francisco Bay area and New York City metropolitan area and the base pay range for this role in those locations is USD $160200 - $261000 per year.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
position will be open for a minimum of 5 days with applications accepted on an ongoing basis until the position is filled.

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age ancestry citizenship color family or medical care leave gender identity or expression genetic information immigration status marital status medical condition national origin physical or mental disability political affiliation protected veteran or military status race ethnicity religion sex (including pregnancy) sexual orientation or any other characteristic protected by applicable local laws regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process read more about requesting accommodations.

Required Experience:

IC