Senior Silicon Validation Engineer FPGA IP & Testing
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Lattice Semiconductor is seeking a seasoned Silicon Design Validation Engineer to drive IP validation from silicon arrival to production release in a fast-paced environment. You will work with SerDes, memory interfaces, and IP blocks, developing robust validation plans and RTL test logic while collaborating across design, verification, and manufacturing teams.
The role demands deep expertise in high-speed design, Verilog/VHDL, FPGA development tools, and automation using Python or similar
#J-18808-Ljbffr Jobleads-USVacancy posted 1 day ago
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