Staff SoC RTL Performance Verification and Emulation Engineer

Job Description Passionate about analyzing performance bottlenecks and driving architectural improvements? Eager to expand into building SoC platforms for performance analysis? Arm’s System‑on‑Chip (SoC) Performance Analysis Team in Central Technology Group builds early performance analysis platforms to enable system technology exploration on future Arm System/SoC architecture. Using workload characterization and analysis, we influence future SoC, CPU and IP designs. We are seeking highly skilled and motivated performance analysis engineers to join our diverse team at Arm. Responsibilities Perform RTL performance analysis and verification for SoC Provide technical leadership while collaborating closely with architecture, design, and modeling teams on high‑performance SoC Implement performance verification plans at SoC‑level and performance debug using both simulation and emulation environments Drive emulation‑based performance studies, including emulator bring‑up and execution of complex, system‑level benchmarks Conduct theoretical analysis of memory system optimizations; develop, run, and analyze benchmarks in simulation and/or emulation environments Debug performance failures, identify design bottlenecks, and propose data‑driven architectural or RTL solutions Develop and enhance debug infrastructure, tooling, and visualization solutions to accelerate performance analysis and root‑cause identification Leverage AI‑based tools and automation to improve engineering productivity and performance analysis workflows Mentor and guide junior engineers, contributing to the technical growth and effectiveness of the team Required Skills and Experience Proven experience in SoC RTL performance analysis and debug using hardware emulation platforms Hands‑on experience with emulator bring‑up, configuration, and development of new performance test cases Strong system‑level performance debug experience across complex IP interactions, including CPU, GPU, and I/O workloads Deep understanding of memory system architecture and interconnect design Excellent knowledge of Verilog and SystemVerilog Working knowledge of C, C++, and a scripting language such as Python or Ruby Proven understanding of multiprocessor coherency, memory ordering, I/O ordering, interrupts, MMU, and cache architectures Strong debugging, data analysis, and technical presentation skills Nice to Have Proficiency in Unix/Linux, scripting, and source control systems (e.g., Git, Subversion) Familiarity with one or more CPU instruction sets Familiarity with SystemVerilog Familiarity with ARM architecture Experience with compilers, assemblers, or device drivers Salary Range $198,100‑$268,000 per year Equal Opportunity Employer Arm is an equal‑opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and we do not discriminate on the basis of any characteristic. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation. #J-18808-Ljbffr Arm