Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

Senior Logic Design Engineer - Hybrid Datacenter RTL

Intel Corporation

Intel Corporation's HIPD team seeks a senior Logic design engineer to advance the UCIE PHY IP for datacenter/server designs. You will craft RTL, simulate, and contribute to architecture definitions for the IP block. Responsibilities include RTL quality checks, timing and power convergence, and design optimization for performance, area, and reliability. Collaboration across organizations is essential for success. #J-18808-Ljbffr Intel Corporation

Vacancy posted 2 days ago
Similar jobs that could be interesting for youBased on the Senior Logic Design Engineer - Hybrid Datacenter RTL in Santa Clara, CA vacancy
  •  ...using a flexible controller design as the base for all our IP....  ...experienced, conscientious logic design engineer in the Dram Controller IP at...  ...with a strong background in RTL development and a commitment...  ...sponsorship. #LI-MO2 #LI-Hybrid Benefits offered are described... 
    Suggested
    Work experience placement
    Flexible hours

    Advanced Micro Devices

    Santa Clara, CA
    2 days ago
  • $163k - $236k

     ...accelerator IPs.Develop implement, and maintain design blocks or components.Develop SystemVerilog RTL to implement logic for ASIC products according to established...  ...qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a... 
    Senior
    Worldwide

    Google

    Sunnyvale, CA
    3 days ago
  • $163k - $237k

    Lead the microarchitecture and RTL execution to deliver high-performance network design components which meet strict power...  ...Bachelor's degree in Electrical Engineering, Computer Engineering, Computer...  ...including synchronous and asynchronous logic, state machines, and bus... 
    Senior
    Worldwide

    Google

    Sunnyvale, CA
    6 days ago
  • $136k - $218.5k

    We are now looking for a Senior Logic Design Engineer!As a member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip...  ...focusing on such tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure,... 
    Senior
    Full time

    Nvidia

    Santa Clara, CA
    6 days ago
  •  ...Location: San Jose, CA Hybrid Duration: 12 Months Employment...  ...are looking for a highly experienced Senior ASIC Physical Design Engineer to contribute to the development and...  ...responsible for activities spanning RTL synthesis, floorplanning, physical implementation... 
    Senior
    Contract work

    Nexiva Inc

    San Jose, CA
    2 days ago
  • $256.05k - $361.48k

     ...our customers.The Physical Design Integration Engineer performs physical design implementation...  ...of custom CPU designs from RTL to GDS to create a design...  ...closely collaborating with logic, circuit, architecture, and...  ...will be eligible for our hybrid work model which allows... 
    Senior
    Full time
    Work experience placement
    Local area
    Immediate start
    Flexible hours
    Shift work

    Intel

    Santa Clara, CA
    3 days ago
  • AMD in Santa Clara is looking for an experienced Logic Design Engineer to work on Graphics Memory Controller IP for high-performance GPUs. Candidates...  ...like HBM and GDDR. The ideal applicant will be proficient in RTL development, Verilog, and industry-standard CAD tools. This... 

    AMD

    Santa Clara, CA
    2 days ago
  • $200k - $250k

    Job Title: Principal RTL Design Engineer - PCIe / CXL / High-Speed SoCLocation: Santa Clara, CACompensation: $200K - $250K base DOE plus bonus...  ...analysis, debugging, block-level functional verification, logical equivalence checking, and CDC/RDC.Solid experience with implementation... 

    CyberCoders

    Santa Clara, CA
    7 days ago
  • Responsibilities: • Architect, design and implement new features, performance improvements...  ...is a plus. • Proficiency with hardware (RTL) design in Verilog, System Verilog, or VHDL...  ...work well with others and a belief that engineering is a team sport. • Knowledge of at least... 
    Senior

    Baidu

    Sunnyvale, CA
    4 days ago
  • $150k - $250k

    Job Title: Senior ASIC Design EngineerJob Location: Santa Clara, CA or Boston...  ...: ASIC Design, RTL (Verilog/SystemVerilog), Microarchitecture...  ...skilled Senior ASIC Design Engineer to lead the design and...  ...architecture, particularly in AI datacenter applications.Key... 
    Senior

    CyberCoders

    Santa Clara, CA
    6 days ago
  • $141.91k - $200.34k

     ...Description: The Role and ImpactAs a SoC Logic Design Engineer, you will play a pivotal role in...  ...coding at the register transfer level (RTL), and optimizing performance to deliver...  ...RoleThis role will be eligible for our hybrid work model which allows employees to split... 
    Full time
    Local area
    Immediate start
    Worldwide
    Shift work
    Night shift

    Intel

    Santa Clara, CA
    3 days ago
  • $163k - $236k

    Lead the PCIe microarchitecture and RTL development, ensuring high-performance designs that strictly adhere to Power,...  ...:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science...  ...one project focused on PCIe logic.Experience debugging RTL using... 
    Worldwide

    Google

    Sunnyvale, CA
    6 days ago
  • $138k - $197k

     ..., and power-efficient RTL code primarily in SystemVerilog...  ...of internal design tools, flows, and methodologies...  ...degree in Electrical Engineering, Computer Engineering,...  ...learning workloads in datacenters. You will be...  ...integration of key digital logic blocks within the TPU.... 
    Worldwide

    Google

    Sunnyvale, CA
    7 days ago
  • $168k - $264.5k

    We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing team. If you are looking for a challenging and...  ...plusExposure to flash ADC design is a plusExperience with RTL, logic synthesis and verification, knowledge of Place and Route,... 
    Senior
    Full time

    Nvidia

    Santa Clara, CA
    3 days ago
  •  ...Technology team is searching for a passionate and innovative RTL design engineer to develop high-performance, multi-protocol wireline transceivers...  ...off and silicon bring-upPREFERRED EXPERIENCE:  Proficient in logic design concepts and RTL coding using Verilog/System... 

    AMD

    San Jose, CA
    7 days ago
  •  ...career. THE ROLE: We are looking for an adaptive, self-motivative logic design engineer to join our growing mixed-signal high-speed IO team. As a key...  ...architecture/micro-architecture solutionsDevelop Verilog RTL and Functional Behavioral ModelsDrive/develop ASIC design... 

    AMD

    Santa Clara, CA
    3 days ago
  • $168k - $264.5k

    We are looking for a Senior CPU Design Engineer! NVIDIA is seeking best-in-class CPU...  ...sub-systems. Implement in RTL and coordinate execution with...  ...design is functional. Exercise logic design skills to optimize...  ...want to hear from you. #LI-Hybrid Your base salary will be determined... 
    Senior
    Full time
    Remote work

    Nvidia

    Santa Clara, CA
    3 days ago
  • $215k - $275k

    Principal Logic Design Engineer Location: San Jose, CA 95134 or Hillsboro, OR 97006 | Hybrid Remote: 3 days in the office per week Industry: Semiconductor - data centers, security...  ..., Engineering Responsibilities: Leading RTL design and microarchitecture development for... 
    Full time
    Work at office
    Remote work

    Cypress HCM

    San Jose, CA
    16 days ago
  • SPACE EXPLORATION TECHNOLOGIES CORP is looking for a motivated SR. RTL DESIGN ENGINEER in Sunnyvale, CA to develop cutting-edge ASICs for Starlink. This role includes responsibilities in evaluating design architectures, implementing RTL in Verilog/System Verilog, and collaborating... 
    Senior

    SPACE EXPLORATION TECHNOLOGIES CORP

    Sunnyvale, CA
    2 days ago
  • $164.47k - $269.1k

     ...Description: About the RoleAs a Senior SoC Design Verification Engineer, you will lead...  ...closely with architects, RTL designers, security engineers...  ...limited to: Perform functional logic verification of integrated...  ...will be eligible for our hybrid work model which allows employees... 
    Senior
    Full time
    Local area
    Immediate start
    Worldwide
    Shift work

    Intel

    Santa Clara, CA
    3 days ago
  • $120k - $225k

     ...Job Description Job Description We’re hiring experienced RTL Design Engineers to play a key role in designing and implementing the...  ...and RTL implementation, designing high-performance, low-power logic that drives our breakthrough AI hardware.   The team works... 
    Senior
    Night shift

    Mythic

    Palo Alto, CA
    25 days ago
  • $163k - $236k

    Plan the verification of complex digital design blocks by understanding the design specification and interacting with design engineers to identify important verification...  ...verification.Experience in verifying digital logic at RTL using SystemVerilog/UVM for ASICs.Preferred... 
    Senior
    Worldwide

    Google

    Sunnyvale, CA
    3 days ago
  • $168k - $258.75k

    The Senior Datacenter Power Design and Modeling Engineer leads cross-functional execution and modeling for data-center power-delivery programs. This role owns rack-level architecture definition and involvement, end to end power modeling and simulation for advanced Datacenter... 
    Senior
    Full time

    Nvidia

    Santa Clara, CA
    3 days ago
  •  ...programmable embedded IP, resulting in final designs that meet product defined power,...  ...and experience collaborating with other engineers located in different sites/timezones. You...  ...failures to determine the root cause; work with RTL and firmware engineers to resolve design... 

    AMD

    San Jose, CA
    6 days ago
  • $171.6k - $245k

     ...of applications are received.This is a hybrid role that can be performed three days per...  ...San Jose, CA office.Meet the TeamAcacia designs intelligent transceivers using advanced...  ...will work with other Acacia mixed-signal engineers to collaborate in order to provide an optimized... 
    Full time
    Temporary work
    Work at office
    Local area
    Flexible hours
    3 days per week

    CISCO Systems

    San Jose, CA
    5 days ago
  • $138k - $197k

     ...proposing and developing improvements in overall design.Design and document one or more blocks of...  ...:Bachelor's degree in electrical engineering, computer engineering, computer science,...  ...e.g., SoCs, ASICs, etc.).Experience with RTL design using Verilog or SystemVerilog.Preferred... 
    Worldwide

    Google

    Sunnyvale, CA
    3 days ago
  • $116k - $189.75k

     ...are now looking for an ASIC Design Efficiency Engineer! NVIDIA is seeking...  ...generation mobile, embedded and datacenter platforms. This position offers...  ..., area and power efficient RTL to achieve design targets....  ...have a solid understanding of logic design and computer... 
    Full time

    Nvidia

    Santa Clara, CA
    5 days ago
  • $136k - $218.5k

     ...looking for a top-notch ASIC engineer to join the team. The Team is...  ...team collaborates with the front design team to understand the...  ...implement new Clocking topologies in RTL.Collaborate with Physical design...  ....Deep understanding of logic optimization techniques and PPA... 
    Senior
    Full time
    Work experience placement

    Nvidia

    Santa Clara, CA
    3 days ago
  • $163k - $237k

    Engage in developing CPU cache subsystems, focusing on RTL design and microarchitecture for future CPU generations.Collaborate with performance...  ...area.Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or... 
    Senior
    Worldwide

    Google

    Mountain View, CA
    3 days ago
  • $136k - $218.5k

    NVIDIA is looking for a Senior SOC Design Engineer to join our SOC Design team! At NVIDIA, you'll collaborate...  ...improvementsEnsure high-quality RTL delivery to the physical design team with...  ...? If so, we want to hear from you.#LI-Hybrid Your base salary will be determined... 
    Senior
    Full time

    Nvidia

    Santa Clara, CA
    3 days ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to Senior Logic Design Engineer - Hybrid Datacenter RTL. Be the first to apply!