Principal SoC Verification Engineer - SystemVerilog / UVM, AMBA
$200k - $300kCyberCoders
Job Title: Principal SoC Verification Engineer - SystemVerilog / UVM, AMBAJob Location: Los Altos, CA, or San Francisco, CA - hybridCompensation: $200K - $300K base DOE plus equityRequirements: SoC Verification (Full-Chip & Block-Level), SystemVerilog / UVM, AMBA Protocols (CHI, AXI, APB), ARM, HPC / Edge AI SoCPosition OverviewWe're a well-funded, stealth startup building a next-generation, end-to-end computing platform powered by a custom, high-performance edge SoC on an advanced process node. By integrating flagship compute IP into an industry-leading design, we are building the optimized silicon foundation for our software platform from the ground up.We're building a tight-knit, experienced in-house team to drive engineering outcomes and partner with a Tier-1 ASIC design house through the process. As our Lead SoC Verification Engineer, you will help establish the verification and validation methodology for our end product.Key ResponsibilitiesCross-functional reviews: Participate in microarchitecture and design reviews with the designers to better understand the design and help develop a comprehensive DV plan. Develop a detailed test bench and plan for the blocks you will be working on and have them reviewed with the design and SW teams.DV infrastructure development: Develop scalable test benches and libraries for block-level and full-chip-level verification. Ensure stimulus is portable across verification, emulation, and ASIC platforms. Implement a test harness to collect various coverage metrics and scoreboards to track progress through regressions.Full chip/Block level verification: Develop directed/constrained random/random test cases to fully stress the design and track discovered bugs.System Validation: Work closely with the validation team to use an emulation platform for accelerated verification and SW/HW co-development.QualificationsBachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field; advanced degree preferred.10+ years of experience in verifying complex ASICs.Deep knowledge of industry-standard on-chip interconnect protocols (AMBA CHI/AXI/AXI-S/APB).Fluent in System verilog/System-C and UVM.Experience verifying designs with multiple power domains using UPF and industry-standard tools.Proven track record of taking products through first-pass silicon success.Preferred QualificationsExperience with verifying multi-media SOCs.Experience working directly with Arm cores and subsystems.Experience with modeling and performance validation.Exposure to Silicon bring-up.BenefitsMedical/Dental/Vision benefitsVacation/PTO401KEquityFlexible Work Arrangements
$200k - $250k
Job Title: Principal Design Verification Engineer - PCIe / High-Speed SoCLocation: Santa Clara, CACompensation... ...Verification, High-Speed SoC, PCIe / UALink / SerDes, SystemVerilog, UVMPosition OverviewWe are... ...skills (SystemVerilog/UVM, Python, C++, scripting) with...Principal$142.8k - $274.8k
...and Infrastructure Engineering (SCHIE) is the... ...are looking for a Principal Silicon Design Verification Engineer to join the... ...the subsystem and SoC levels, including... ...Architect and extend SystemVerilog and UVM environments that... ...protocols such as AMBA (AXI/AHB/APB), JTAG...PrincipalOngoing contractPermanent employmentWork at officeLocal areaWorldwide3 days per week$168k - $264.5k
....NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next generation SoC and... .... It requires deep knowledge of SystemVerilog and UVM, along with a solid grasp of ASIC verification... ...and bus protocols (e.g., AMBA AXI, CHI, or equivalent), with solid...SuggestedFull timeNight shift$168k - $264.5k
We are looking for a Senior Verification Infrastructure Engineer to join the SoC verification team at NVIDIA. In this role, you will build, develop, and... ...experience8+ years in the following areas: SystemVerilog, UVM, and modern verification methodologiesExperience...SuggestedFull time$220.92k - $311.89k
...Job Description: Intel’s AI SoC organization is driving innovation... ...cloud. As a Senior Formal Verification Engineer, you will play a critical... ...environments using SystemVerilog Assertions (SVA) and industry... ...techniques.• Familiarity with UVM-based simulation environments...SuggestedFull timeInternshipLocal areaImmediate startShift work$141.91k - $200.34k
...in the industry.Position OverviewAs a SoC Design Verification Engineer, you will play a pivotal role in ensuring... ...Key ResponsibilitiesCreate and update UVM-based test bench generation and test... ...planningThe experience must include:AMBA protocols such as CHI, AXI, AHB, and APB...Full timeLocal areaImmediate startShift work$120k - $250k
...availability. MatX is seeking silicon verification engineers to join our team as we create best-in-... ...to production silicon Experience with SystemVerilog, Python, C/C++, Bluespec and similar scripting... ...verification methodologies such as UVM, assertion-based verification (ABV);...Full timeWork experience placementLocal areaRemote workMonday to FridayFlexible hours$142.8k - $274.8k
...Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s... .... The AI Silicon Engineering (AISiE) SoC Design Verification team is seeking passionate, driven,... ...stimulus generation, System Verilog, UVM, and coverage closure.Experience with...PrincipalOngoing contractPermanent employmentWork at officeLocal areaWorldwide3 days per week$183k - $247.6k
...the Inferentia and Trainium SOCs that are used to power today’... ...are seeking experienced Design Verification Engineers to build the next generation... ...experience using System Verilog and UVM- 8+ YOE in testbench... ....g. Python.- Experience with AMBA protocols, for e.g. AHB/APB/AXI...Local areaWork from homeFlexible hours$120k - $243k
ASIC Verification Engineer This role has been designed as 'Hybrid' with a requirement... ..., and maintain advanced UVM verification environments,... ...testing, debug complex SoC designs, and ensure functional... ...closure. Strong expertise in SystemVerilog and UVM methodology,...Full timeWork experience placementWork at officeLocal areaImmediate start2 days per week$119.8k - $234.7k
...Hardware, and Infrastructure Engineering (SCHIE) is the team... ...looking for a Senior Verification Engineer to join the team... ...Methodology (UVM) components to interface... ...ASIC) or System on Chip(SOC).7+ years of industry experience... ...Bus Architecture (AMBA) Advanced eXtensible Interface...Ongoing contractPermanent employmentInternshipWork at officeLocal areaWorldwideNight shift3 days per week$163k - $237k
Define and drive the formal verification sign-off approach across complex IP and SoC designs, utilizing... ...flows, and high-coverage SystemVerilog Assertions (SVA) suites... ...and verification engineers to effectively incorporate... ...topologies, protocols (AXI/AMBA).In this role, you’ll...Worldwide$163k - $237k
Develop verification plans and test plans for digital intellectual... ...logic at RTL using SystemVerilog and industry-standard... ...such as VMM, OVM, or UVM.Execute gate-level... ...degree in Electrical Engineering, Computer Engineering,... ...interfaces (e.g., MIPI, ARM AMBA, UART, I2C) and...Worldwide$163k - $237k
...advanced, end-to-end UVM testbenches from scratch... ...IPs.Drive verification excellence by implementing... ...guide junior verification engineers on design verification... ...at the RTL level using SystemVerilog or C/C++.Experience verifying... ...verification of SOCs, pre-silicon analysis...Worldwide$164.47k - $311.89k
...seeking a Senior Design Verification Engineer for the Silicon... ...DV, and subsystem and SoC-level verificationExperience... ...bus protocols such as AMBA (CHI, ACE, AXI), PCIe,... ...including UVM, SVA, ABV, and co-simulation... ...coding experience across SystemVerilog/UVM, C/C++, Python, and...Full timeInternshipLocal areaImmediate startShift work$164.47k - $269.1k
Job Details:Job Description: About the RoleAs a Senior SoC Design Verification Engineer, you will lead verification efforts for complex system-on-chip... ..., implementation, and debug.System Verilog, OVM or UVM methodologies, and SoC test environment/VC development.Debugging...Full timeLocal areaImmediate startWorldwideShift work$158.6k - $237.6k
..., and telecom customers. The SoCs encompass best-in-class performance... ...Marvell Data Center Design Verification Team, you will verify all of... ...simulation test bench in UVM. · Develop and execute test-plans... ...· Coach and mentor junior engineers of the team when necessary to...PrincipalPermanent employmentFull timeInternshipWork from home$138k - $198k
Plan the verification of complex digital design blocks by fully... ...with design engineers to identify important verification... ...environment using SystemVerilog and Universal Verification Methodology (UVM).Identify and write all... ...Experience with three or more SoC projects/cycles....Worldwide$105k - $260k
...opportunity to work alongside engineers who built iconic processors... ...YouTubePrincipal CPU Design Verification Engineer:We are seeking an... ...implementationsSkills & Qualifications Required:SystemVerilog verification development... ...construction using UVM or analogous...PrincipalContract workWork at office- ...SRI Tech SolutionsJob Title:Design Verification EngineerLcation: Sunnyvale CA /Redmond... ...Contractors-IP level Verification - SOC Design Verification· Strong understanding of SV and UVM and good debugging skills.· Understanding of AMBA protocols.· Understand design specs...Full timeFor contractorsRemote work
$210k - $355k
..., with the ultimate goal of enabling human life on Mars.PRINCIPAL DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING)At SpaceX we’re leveraging our experience... ...with verification methodologies such as UVM/OVM/VMMStrong object-oriented programming knowledgeStrong...PrincipalPermanent employmentTemporary workWorldwideWeekend work- ...team developing state-of-the-art WiFi SoCs that power hundreds of millions of... ...through production. As a Wireless Radio Verification Engineer, you'll ensure first-time-right... ...knowledge of ASIC verification flows with SystemVerilog and UVM including testbench architecture,...Worldwide
Apple
Sunnyvale, CA5 days ago $119.8k - $258k
...We are looking for a Design Verification Engineer to support SoC-level verification of advanced high-speed and security IP. This role involves... ...and execute SoC and IP-level verification using SystemVerilog and UVM Verify UCIe , Ethernet MAC & PCS , and PCIe designs...Full timeSintegra
Sunnyvale, CA1 day ago$150k - $250k
Job Title: Senior ASIC Verification EngineerJob Location: Santa Clara, CA or... ...DOE plus equityRequirements: ASIC/SoC Verification, RTL Verification, UVM / SystemVerilog, High-Speed Interconnects (... ...skilled Senior ASIC Verification Engineer to join our dynamic team. This role...$168k - $264.5k
...world.NVIDIA is looking for a Senior Verification Engineer to join our Emulation division... ..., SpeedBridges, Accelerated UVM Testbenches).Bring up SOCs on emulation, root causing SoC/Processor... ...Verilog and/or VHDL, C/C++ and SystemVerilog.Experience with UVM verification...Full timeWorldwideFlexible hours$168k - $264.5k
...are seeking a skilled Senior Verification Engineer to join our Display Team and... ...world's foremost GPU and SoC display engines! Working alongside... ...), and build scalable UVM-based infrastructure; leverage... ...hands-on expertise in UVM, SystemVerilog, Verilog, Python, and C/C++,...Full time$183k - $247.6k
...company that designs and engineers high-profile consumer... ...built the innovative SoCs AZ3 and AZ3 Pro that... ...architecture, RTL design, verification and emulation teams to... ...- 7+ years of UVM, C, System C, and scripting... ...skills in Python, C/C++, SystemVerilog, or similar languages...Local areaFlexible hours$158.6k - $317.8k
...to grow, we’re looking for a skilled Principal Design Verification Engineer to join our dynamic team and... ...verification activities for complex SoC/ASIC designs. The ideal candidate will have strong expertise in SystemVerilog, UVM, and functional verification, along...PrincipalFull timeLocal areaImmediate startVisa sponsorshipRelocation package$168k - $264.5k
...now looking for a Senior System Verification Engineer to join our Emulation division and... ..., SpeedBridges, Accelerated UVM Testbenches).Bring up GPUs, SOCs, Switch, NIC on emulation, root... ...Verilog and/or VHDL, C/C++ and SystemVerilog.Protocol knowledge of at least one...Full timeWorldwideFlexible hours$120k - $275k
...seeking silicon micro-architects and design engineers to join our team as we create best-in-... ...field.Experience validating complex SoCs, accelerators, or highly integrated... ...with Cadence Palladium.Experience with SystemVerilog, UVM, assertions, coverage, or waveform debug...Full timeWork experience placementLocal areaRemote workMonday to FridayFlexible hours
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