Principal High-Speed I/O Architect (PCIe, CXL, UA Link)
$253.3k - $342.7kArm Limited
Job Overview: At Arm, the High-Speed I/O Architect defines and designs innovative on-chip interconnect architectures-coherent and non-coherent-for scalable SoC platforms. You will work across markets including mobile, automotive, datacenter, networking, and IoT, contributing to production-quality silicon with top-tier performance and efficiency. Collaborating with multi-functional teams, you'll shape the interconnect infrastructure that powers next-generation SoCs. Responsibilities: Architect high-speed interconnect subsystems—including PCIe, CXL, and UA Link—and define coherent and non-coherent communication architectures across a range of silicon products. Define IP and subsystem roadmaps for high-speed I/O and interconnect technologies in close partnership with SoC architecture and core technology teams. Lead early architecture engagements with customers, shaping system requirements and delivering clear, implementation-ready specifications. Collaborate with performance, power, and physical design teams to optimize PCIe/CXL/UA Link subsystem behavior, bandwidth, latency, and overall system efficiency. Develop SoC architecture integrating Arm IP and high-speed I/O subsystems to meet compute, memory, and interconnect performance targets. Partner with software, firmware, and platform teams to optimize end-to-end solutions spanning hardware, drivers, and system software. Support detailed use-case exploration, workload analysis, and performance modeling to guide architectural decisions. Required Skills and Experience: 8+ years of experience with coherency protocols, hierarchical cache design, and system-level coherency architectures. Deep expertise in PCIe, CXL, and UA Link protocols, including link-level behavior, transaction flows, ordering models, memory expansion/pooling, die-to-die or chiplet connectivity, and host/device integration. Consistent track record collaborating with performance, power, and physical design teams on the PCIe, CXL, and UA Link stack. Strong knowledge in areas such as heterogeneous compute, PCIe/CXL/UA Link subsystem design, security, caching, memory systems. Demonstrated communication and leadership skills with the ability to influence executive stakeholders and multi-functional teams. Bachelor’s or Master’s degree (or equivalent) in Electrical or Computer Engineering with 10+ years of experience in semiconductor architecture, design, or related roles. Nice To Have Skills and Experience: Ability to thrive in dynamic environments with shifting priorities. Constructive, strategic approach to challenge and improve status quo. Track record of delivering complex projects on time and to spec. In Return: To join a newly forming Solution Engineering SoC architecture team with significant opportunities to impact the shape, definition, and culture of the team and help build our future success! This will be a fast paced and exciting environment with opportunities to demonstrate your strategic and innovative thinking while directly chipping in to current projects. Arm is proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work collaboratively to defy ordinary and shape extraordinary! Partner and Customer Focus Collaboration and Communication Creativity and Innovation Team and Personal Development Impact and Influence Deliver on Your Promises We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation. Our 10x mindset guides how we engineer, collaborate, and grow. Understand what it means and how to reflect 10x in your work:
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Salary Range: $253,300-$342,700 per year We value people as individuals and our dedication is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process. Accommodations at Arm At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email View email address on click.appcast.io. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Hybrid Working at Arm Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you. Equal Opportunities at Arm Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran. #J-18808-Ljbffr Arm Limited$253.3k - $342.7k
...technology firm located in San Jose, California, is seeking a High-Speed I/O Architect. The successful candidate will define and design... ...The ideal candidate will have extensive experience with PCIe, CXL, and UA Link protocols, along with the ability to collaborate...Suggested$253.3k - $342.7k
A leading semiconductor company seeks a High-Speed I/O Architect located in San Jose, California. In this role, you will design innovative... ...with coherency protocols and deep expertise in PCIe, CXL, and UA Link. This position offers a competitive salary ranging from...Suggested- ...to the ASIC (chip) design for high-performance network chips: AINIC... .... KEY RESPONSIBILITIES PCIe architecture, design, and integration... ...and integration of high‑speed I/O subsystems Collaboration with... ...PCIe Transaction layer, Data Link layer, and Physical layer protocols...Principal
- ...AMD Firmware I/O Interconnect Architect What You Do At AMD... ...Intelligence (AI), High Performance Computing... ...for high-speed interconnects. This... ...role will focus on PCIe Gen 6/7/8 and emerging... ...standards (PCIe, CXL, OCI), contributing... ...boot, enumeration, link training, error handling...Suggested
$190k - $223k
...Labs is seeking a Senior Staff Engineer in San Jose, CA, to own electrical modeling for silicon photonics I/O platforms. You will design and analyze high-speed links, contributing significant expertise in analog front-end design and DSP. This role requires a Master’s...Suggested- ...skilled engineer to contribute to ASIC design for high-performance network chips. You'll work within the NTSG... ...ideal candidate will have a strong background in PCIe architecture, hands-on experience with high-speed I/O systems, and a relevant degree. Benefits offered include...
- A leading semiconductor company seeks a Lead Analog SerDes Architect/Design Engineer to shape the future of data center connectivity... ..., CA. The ideal candidate will have a strong background in high-speed serial link design, with hands-on experience in analog CMOS/BiCMOS...
- ...candidates will have over 15 years of relevant experience, an advanced degree in Electrical Engineering, and a strong track record in high-speed circuit design. Responsibilities include architectural direction, innovation in design, and collaboration with global teams. The...Flexible hours
- ...(AECG) is looking for a SoC Architect to join the team in defining... ...leverage the state-of-the-art PCIe, CXL, UAL, and Confidential Compute... ...towards delivering innovative and highly competitive adaptive... ..., with a particular focus on I/O subsystems connected over PCIe...Flexible hours
- ...company in San Jose is looking for a SoC Architect to drive architecture initiatives for the... ...Embedded SoCs. This role involves defining I/O subsystem architectures and collaborating... ...background in SoC design, knowledge of PCIe standards, and experience in embedded computing...
$147k - $165k
...Firmware Engineer - PCIe/CXL Memory Solutions... ...devices that power high-performance computing... ...working with high-speed interfaces and protocols... ...at PHY and Link layers. Interpret... ...Familiarity with server I/O and memory... ...- 230,000 USD for Principal. Your base salary will...Flexible hours- ...Description An AI Interconnect Architect defines and engineers high-speed networking and communication... ...interconnect technologies such as PCIe, CXL, co-packaged optics, UALink, Ultra... ...technologies including transport and link level protocols, switching fabrics,...PrincipalTemporary workRemote workFlexible hoursShift work
$270k - $300k
...Companies is seeking an ASIC Architect to join a fast-growing... ...modeling, and implementation of high-performance ASIC... ...buffering schemes, and high-speed datapaths. Solid grasp of... ...design, including high-speed I/O integration like PCIe and SerDes. Proven ability...PrincipalPermanent employment$210k - $260k
...Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based... ...more at Role Overview As a Sr. Principal DSP Architect, you will be the technical visionary... .... Your focus will be on high-speed PAM4 (Pulse Amplitude Modulation 4...PrincipalFlexible hours$154.68k - $231.7k
...technologies, including ultra-fast read channels, high-performance processors, leading edge... ...involved in the development of CXL and PCIe End Point devices of Marvell. Responsible... ...various cross-functional groups such as Architect, other development teams, QA/Validation,...PrincipalPermanent employmentInternshipWork from home- A high-tech startup in Santa Clara is seeking a Sr. High-Speed Package Design Engineer to join its growing team. In this role, you will focus on signal integrity and power integrity for advanced networking products. Ideal candidates will have a strong background in PCB...
$200k - $351k
Celestica Inc. is seeking a Senior Principal Engineer specializing in Signal Integrity in San Jose, CA. This role involves defining next... .... Ideal candidates should have over 12 years of experience in high-speed signal delivery design, proficiency with simulation tools, and...- A leading semiconductor company in San Jose seeks a SerDes Micro Architect with expertise in high-speed SerDes RTL design. The ideal candidate will drive architecture requirements and collaborate with cross-functional teams. Strong communication and problem-solving skills...
- Zealogics.com is seeking a highly experienced engineer in San Jose to lead FPGA design and high-speed digital systems. You will define FPGA subsystems, design DC/DC power systems, and collaborate across engineering teams to align designs with system requirements. The ideal...
$224k - $356.5k
...team and see how you can make a lasting impact on the world. NVIDIA is seeking a visionary and technically grounded High-Speed Interconnect Architect to define and drive the future of our high-speed (=100Gbps per lane) interconnect solutions. This role is ideal for...$187k - $270k
Altera is looking for a highly experienced Signal Integrity & Power Integrity Principal Engineer to lead innovative design efforts in San Jose, California. This role... ...of industry experience and expertise in high-speed interconnects. The candidate will define simulation...Principal$168k - $264.5k
Senior Design Engineer, Coherent High Speed Interconnect page is loaded##... ...and GPUs.* Collaborate with architects, external partners, software... ...interconnect protocols like PCIE, CXL, AXI, CHI will be useful.*... ...Understanding or experience with Link layer stacks including Data...- A leading technology company is seeking a Signal Integrity Architect to develop high-performance signal integrity solutions for advanced server... ...teams and the definition, analysis, and verification of high-speed interconnects. Ideal candidates have a Master’s degree in...
- A global technology leader based in San Jose, CA is looking for a SerDes Micro Architect to join their innovative team. The successful candidate will focus on high-speed SerDes RTL design, defining micro-architecture requirements, and collaborating with cross-functional...
- ...Principal ASIC Architect Sunnyvale, CA About our company - Tensordyne (formerly... ...problems. Tensordyne builds high-performance, low-power... ...RISC-V CPU cores, and high speed serial communications with chip... ...networking fabric, HBM, and PCIe connectivity. Analyze technical...PrincipalRemote work
- ..., California. This role involves ensuring the reliability and performance of next-generation products by modeling and validating high-speed interconnects and collaborating with various teams. Candidates should have strong experience in high-speed signal integrity engineering...
- Amphenol Corporation is seeking a Principal Signal Integrity Engineer in Santa Clara, California. This role involves leading technical projects in high-speed cable assembly design and providing solutions for customers' data transmission needs. Candidates should have a BS...
- d-Matrix inc. in Santa Clara is seeking a Sr. Staff PCB Layout Design Engineer. In this role, you will lead PCB design for high-complexity AI accelerators, ensuring optimal signal integrity and power delivery. Candidates should have over 12 years of relevant experience...
$164.8k - $226.6k
...00 applications, including high-growth ones in AI datacenters... ...Job Summary The Principal Hardware Signal Integrity/Power Integrity Architect is accountable for system-level... ...design Experience in high-speed interface design, e.g., DDR, PCIe, USB, and similar protocols...Principal- TylSemi in San Jose is seeking a High-Speed IO Architect to lead the architecture of high-speed interfaces across product families. You will drive... ...15 years of experience, including significant expertise in PCIe and UCIe standards, alongside a strong track record in...
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