AI Engineer

San Francisco Bay Area, CA · Hybrid · Full-time

We are looking for an AI System Engineer who builds the core AI systems that generate and optimize chip designs. You will develop models that write RTL, understand power-performance-area tradeoffs, and learn from verification feedback to continuously improve.

In this role, you will work on derivative design generation—transforming existing RTL based on delta specifications—and the self-improvement loop that makes our AI get better over time. You will build AI that writes hardware, not just software. This is one of the most challenging and rewarding problems in applied AI today.

What You Will Do

• Build Code Generation Models : Develop and fine-tune LLMs that generate syntactically and functionally correct Verilog/SystemVerilog with the best power-performance-area.
• Develop Derivative Design Generation : Build systems that take existing RTL and a delta specification, and produce modified RTL that implements the requested changes while preserving correctness.
• Design Space Exploration : Build algorithms that automatically explore the design space, proposing delta specs that improve PPA (power, performance, area) while maintaining functionality.
• Optimize Inference : Ensure our models run fast enough for interactive use. You will optimize inference latency and throughput for production deployment.
• Curate Training Data : Develop pipelines to collect, clean, and curate training data from verified designs. Data quality is model quality.

What You Bring (Required)

• LLM/Transformer Expertise : Deep experience with dataset preparation and creation, large language models, transformer architectures, and their training. You understand attention mechanisms, tokenization strategies, and scaling laws.
• Code Generation Experience : Worked on code generation systems. You understand the unique challenges of generating executable code versus natural language.
• PyTorch/JAX Proficiency : Expert-level skills in PyTorch or JAX. You can implement custom model architectures and training loops.
• Distributed Training : Experience training large models across multiple GPUs/TPUs.
• Reinforcement Learning : Familiarity with RL concepts.

Bonus Points (Preferred)

• Experience at AI labs and/or AI startups.
• Background in compilers, program synthesis, or formal methods.
• Understanding of hardware design concepts (RTL, synthesis, timing, PPA).
• Experience with code LLMs.
• MS or PhD in Computer Science with ML focus.

Why Join Us

You will build AI that designs chips—one of the most complex engineering artifacts humans create. This isn't incremental improvement; it's a fundamental shift in how chips are designed.

• Shape the future of chip design by building "tools that build the chips"
• Work at the intersection of AI, automation, and silicon design
• Your software will multiply the productivity of entire engineering organizations
• Join a team that values software best practices applied to the hardware domain