Senior Front-End ASIC Design Engineer (RTL/Microarchitecture)
6AM City, LLC
6AM City, LLC is seeking an experienced ASIC Design Engineer in California to support customer designs through all phases of execution. The ideal candidate will have 5+ years of Front-End ASIC Design experience, a Bachelor's degree in Electrical Engineering, and a strong understanding of microarchitecture. This role involves contributing to microarchitecture, RTL design, and synthesis while ensuring that project milestones are met with high quality. Experience with digital design and system Verilog is preferred. #J-18808-Ljbffr 6AM City, LLC
Vacancy posted 4 days ago
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