Senior Digital Design Engineer - RTL-to-Silicon Lead
InvenSense Inc.
InvenSense Inc. in San Jose, CA, part of the TDK Group, seeks senior engineers to lead ASIC design across RTL to layout for MEMS sensor products. You will interface with Analog/MEMS teams to optimize sensor architectures and verify digital IPs through silicon bring-up. The role requires 10+ years (or a PhD with 8+ years) of experience, strong Verilog/SystemVerilog, and MATLAB/Simulink proficiency, with FPGA prototyping familiarity. Collaborative, detail-oriented candidates thrive here. #J-18808-Ljbffr InvenSense Inc.
Vacancy posted 1 day ago
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