R&D Engineer IC Design

Job Description Engineer will be responsible for verification of complex switch designs. Responsibilities include creating SystemVerilog-based verification environments (testbenches, checkers, transactors) and developing and executing test plans for verification of RTL- and gatesim-based designs at both the block and chip levels. The engineer will also create ATE testing vectors and C-based diagnostic tests to be run on actual silicon. Job Requirements A master's degree in Electrical and Electronic Engineering, Computer Science, or equivalent. Minimum of six years of work experience in Design Verification. Strong knowledge and hands‑on experience in verification methods, tools, and environments. Strong programming skills in SystemVerilog and scripting languages. Knowledge and experience with UVM methodology is preferable. Knowledge of networking and switching concepts is a plus. Compensation and Benefits The annual base salary range for this position is $120,000 - $192,000. The position is eligible for a discretionary annual bonus and equity awards per company plan documents. Benefits include medical, dental, and vision plans; 401(k) participation with company matching; Employee Stock Purchase Program (ESPP); Employee Assistance Program (EAP); company-paid holidays; paid sick leave and vacation time; and adherence to all applicable laws for Paid Family Leave and other leaves of absence. Equal Opportunity Employer Broadcom is proud to be an equal‑opportunity employer. We consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status, or any other characteristic protected by federal, state, or local law. We also consider qualified applicants with arrest and conviction records consistent with local law. #J-18808-Ljbffr