Post Silicon Validation Engineer II

Position Overview We invite you to join a growing and innovative IP team dedicated to building best‑in‑class digital and mixed‑signal IP solutions. You will work alongside seasoned professionals developing high‑performance IP across protocols such as PCIe and Ethernet. In this role, you will be integral to the organization’s efforts to support post‑silicon bring‑up and characterization. Responsibilities Evaluation of Cadence’s cutting‑edge designs in silicon in a lab environment Development of test methodologies and improvements to current test practices for validating silicon designs against various industry standards and internal specifications Devise script infrastructure and write scripts for configuring the device, test automation, and data analysis Collaborate with analog designers, digital designers, and system designers in devising experiments, driving data collection, and presenting results analysis Test report generation for internal and customer consumption Support customer demonstrations of Cadence’s products and assist Application Engineers in supporting customer issues and debugging Leverage AI‑powered tools and assistants to enhance productivity, improve decision‑making, and maintain high‑quality customer deliverables; apply AI‑powered analytics tools to extract insights, identify patterns, and generate actionable recommendations from complex datasets Requirements / Qualifications B.S. or M.S. degree in Electrical, Computer Engineering, Engineering Science, or a related engineering subject area 1+ years of validation experience in high‑speed analog/mixed‑signal designs Experience with high‑speed test equipment such as Bit‑Error Rate Tests (BERT), oscilloscopes, spectrum analyzers, and network analyzers Solid software programming/scripting experience in languages such as Python or similar object‑oriented languages Self‑starter who takes initiative, strong communication skills, and is a great teammate Equal Employment Opportunity Cadence is committed to equal employment opportunity throughout all levels of the organization.All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class. #J-18808-Ljbffr Cadence Design Systems