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Senior/Principal Hardware ASIC Validation Engineer

$82.3k - $220k

The Charles Stark Draper Laboratory, Inc.

Overview: Draper is an independent, nonprofit research and development company headquartered in Cambridge, MA. The 2,000+ employees of Draper tackle important national challenges with a promise of delivering successful and usable solutions. From military defense and space exploration to biomedical engineering, lives often depend on the solutions we provide. Our multidisciplinary teams of engineers and scientists work in a collaborative environment that inspires the cross-fertilization of ideas necessary for true innovation. For more information about Draper, visit

Job Description Summary

A Senior Analog ASIC Validation Engineer specifies, designs, verifies, tests and validates on the bench, and documents Application-Specific Integrated Circuits.

Responsibilities

  • The candidate will be involved in every phase of product development from inception to first silicon bring-up, through correlation, characterization, qualification, release to manufacturing and throughout the life cycle of the product
  • The ideal candidate will be technically strong and will have experience with both Analog and Mixed-Signal products
  • The candidate will have the opportunity to mentor and train junior engineers
  • Generation of detailed test plans guaranteeing EC table performance and functionality
  • Early collaboration with design to implement testability features to optimize cost and improve quality
  • Develop innovative, cost-efficient, and manufacturable wafer-level and IC test solutions on high performance analog & mixed signal ATE platforms
  • Execute all phases of the development process including silicon debug, correlation, characterization, limit generation, yield analysis and offshore production transfer
  • Schematic design, layout supervision, component procurement and assembly supervision of multi-site ATE HW for precision analog amplifiers and mixed signal IC’s
  • Perform characterization data analysis using statistical methodologies for silicon characterization
  • Design and develop high performance test solutions on products for first silicon verification, characterization, qualification, and manufacturing of precision digital and mixed signal products
  • Define test schematics and work with lay-out engineers to design printed circuit boards multi-site test hardware
  • Debug test programs, correlate production test solutions to engineering bench measurements, and transfer production test solutions to manufacturing sites
  • Participate in new product development teams and evaluate new test systems for future applications
  • Work with the Design and Systems/Applications teams to develop and implement a Design for Test plan, and take tests in the Design Verification environment to the Automatic Test Equipment
  • Manage and maintain project schedules that align with product introduction and release

Duties/Responsibilities

  • Design and simulate circuits at transistor-level to implement architecture and requirement specifications
  • Contribute to system-level design
  • Optimize hardware designs for performance, power, and cost
  • Evaluate the hardware feasibility of complex algorithms and requirements
  • Independently contribute to complex chip architectures and designs
  • Independently drive solutions to complex problems - develop requirements, propose ways forward when customer requirements are unclear or incomplete, and adapt appropriately to changes in requirements
  • Contribute to business development and proposal activities
  • Develop, document, and teach best practices to less experienced engineers
  • Perform or guide physical layout, including floor-planning, and simulate circuits using extracted parasitics
  • Perform other duties as assigned

Skills/Abilities

  • Proficiency in integrated circuit design
  • Understanding of integrated circuits, semiconductors, and general computer architecture
  • Ability to write detailed design specifications
  • Ability to manage small technical teams
  • Excellent verbal and written communication skills
  • Excellent mathematical skills
  • Excellent organizational skills and attention to detail
  • Excellent time management skills with the proven ability to meet deadlines
  • Strong analytical and problem-solving skills
  • Ability to prioritize tasks
  • Demonstrate strong organization, planning, and time management skills to achieve program goals

Education

Requires a bachelor's degree in Engineering, or related field. Masters degree preferred.

Experience

Requires 5-7 years of experience with a bachelor's degree, or 3-5 years of experience with a master's degree, or 0-2 years of experience with a PhD in ASIC Hardware Engineering or related.

Preferred Qualifications

  • Experience with low power circuit design
  • Experience with CMOS advanced nodes below 32nm
  • Experience with radiation-hardened electronics

Applicants selected for this position will be required to obtain and maintain a government security clearance.

The Odon, Indiana facility is located in the View email address on click.appcast.io Technology Park adjacent to Crane NSWC. This technology hub focuses on the development and production of critical microelectronics components. The office is a short commute from Bloomington, IN, a vibrant community with excellent schools, parks, restaurants, and outdoor activities.

This position available for the Boston area as well.

Benefits

  • Workplace flexibility
  • Employee clubs ranging from photography to yoga
  • Health and finance workshops
  • Off site social events
  • Discounts to local museums and cultural activities

Draper is committed to creating an inclusive environment.

We understand the value of inclusivity and its impact on a high-performance culture. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, disability, age, sexual orientation, national origin, veteran status, or genetic information.

Draper is committed to providing access, equal opportunity, and reasonable accommodation for individuals with disabilities in employment, its services, programs, and activities.

To request reasonable accommodation, please contact View email address on click.appcast.io.

Job Location - City: Cambridge

Job Location - State: Massachusetts

Job Location - Postal Code: 02139-3563

The US base salary range for this full-time position is $82,300.00 - $220,000.00 Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Union ranges will be in compliance with the collective bargaining agreement's approved rates by location and role. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and does not include bonuses or benefits.

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Vacancy posted 1 hour ago
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