ASIC Verification Engineer - SystemVerilog & UVM
Blue Origin
Blue Origin in the United States is seeking early-career engineers to contribute to Verilog/SystemVerilog design and verification of digital blocks within large SoCs. You will work with senior engineers on testbenches, coverage, and integration of external IP, applying industry verification methodologies. The role emphasizes collaboration, learning, and applying basic scripting (Python/Perl) for tooling, with opportunities to co-locate with hardware teams. #J-18808-Ljbffr Blue Origin
Vacancy posted 2 days ago
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