Hardware Engineer IV

Job Responsibilities:

• Work with Product Hardware and Software Architecture teams to define the DSP Hardware architecture requirements
• Define Tensilica DSP configuration and generate RTL.
• Work with Design and Verification teams on the IP integration
• Design optimized TIE floating point modules and TIE operations for Tensilica DSP.
• Area and Energy optimized
• Conduct full verification (ISS and RTL) of the TIE modules and operations
• Document the usage of the developed modules and operations
• Work with architects to understand requirements
• Working with hardware engineers to build DSP and integrate that into their hardware
• Working with SWE to run software on that hardware
• Measure and improve performance

Skills:

• DSP, RTL

Education/Experience:

• Previous experience in Tensilica DSP and TIE (Tensilica Instruction Extension) design
• Strong knowledge of IEEE floating point specifications.
• Strong experience in floating-point RTL design
• Minimum 5 years of RTL design experiences using industry standard EDA tools
• Ability to write basic C codes to conduct RTL/TIE design verification
• Experience with low power design and optimization.
• Experience with Firmware, DSP coding and optimization
• Experience with design synthesis and timing optimization.