Director of ASIC Design

Overview Lead global ASIC Physical Design teams responsible for delivering complex digital and mixed-signal ASICs from RTL through GDSII. This role owns physical design strategy, methodology development, team leadership, and execution across advanced technology nodes, with a focus on achieving aggressive performance, power, and area (PPA) targets while enabling successful silicon delivery. Responsibilities Lead and manage physical design teams across the United States, India, and Italy. Define physical design strategy, technical direction, and execution plans for multiple ASIC programs. Develop and implement advanced physical design methodologies, including Customer Owned Tooling (CoT) flows. Drive all aspects of the physical design flow, including floorplanning, power planning, placement, CTS, routing, timing closure, IR/EM analysis, DRC/LVS, and DFM/DFY. Optimize designs to meet performance, ultra-low power, and area targets on advanced process nodes. Partner with architecture, RTL, DFT, CAD, package, and test teams to support successful silicon execution. Manage EDA vendor and IP provider relationships. Identify project risks and develop mitigation strategies. Oversee resource planning, project schedules, and departmental budgets. Mentor and develop engineering talent while promoting technical excellence and continuous improvement. #J-18808-Ljbffr