Founding Engineer - FPGA

Empathy Talent is partnering with an early-stage AI semiconductor startup developing next-generation computing hardware designed to power increasingly demanding artificial intelligence workloads. Backed by an experienced engineering team, the company is building high-performance accelerator technology focused on delivering exceptional compute efficiency, scalability, and performance. This is an opportunity to join at the ground level and help shape both the product and the future direction of the organization. The Opportunity Our client is seeking a Founding Engineer to help architect and develop core hardware for next-generation AI accelerators. Working alongside a highly technical founding team, you\'ll design high-performance digital logic, collaborate across architecture, verification, and physical design, and play a significant role in bringing advanced silicon from concept through implementation. This position is ideal for engineers who enjoy solving complex hardware challenges, thrive in startup environments, and want meaningful ownership over technical decisions. Key Responsibilities Design and implement synthesizable RTL using Verilog and SystemVerilog for advanced compute architectures Develop high-performance datapaths, memory subsystems, and digital logic supporting AI workloads Collaborate with architecture, verification, and physical design teams to optimize power, performance, and area (PPA) Develop synthesis constraints, support timing closure, and iterate on implementation to meet design goals Perform RTL quality checks through linting, CDC/RDC analysis, assertions, and peer code reviews Develop and maintain automation scripts and design flows using Python, Tcl, or similar tools Contribute to FPGA prototyping and hardware validation efforts Participate in architectural discussions and technical decision-making throughout the product development lifecycle What We\'re Looking For Bachelor\'s degree in Electrical Engineering, Computer Engineering, or a related discipline Strong background in digital design fundamentals, including RTL design, pipelining, clock/reset architecture, and microarchitecture Experience designing synthesizable RTL using Verilog and/or SystemVerilog Knowledge of synthesis flows, SDC constraints, timing closure, and PPA optimization Experience with industry-standard front-end design tools such as VCS, Questa, Xcelium, Verilator, SpyGlass, Design Compiler, or Genus Familiarity with RTL verification methodologies including linting, CDC/RDC analysis, assertions, and code reviews Background designing compute engines, memory subsystems, GPUs, AI accelerators, CPUs, or other high-performance digital hardware Comfortable working cross-functionally with architecture, verification, and physical design teams Preferred Qualifications Experience integrating PCIe, CXL, DDR/HBM, Ethernet, SerDes, or similar high-speed interfaces FPGA prototyping or ASIC development experience Exposure to firmware, drivers, hardware/software integration, or system bring-up Previous ASIC tapeout experience through industry or academic projects Strong mathematical and analytical problem-solving skills What\'s on Offer Competitive base salary and meaningful equity participation Opportunity to join as one of the company\'s earliest engineering hires Significant technical ownership with direct influence over product architecture Direct collaboration with an experienced founding engineering team Long-term leadership and career growth opportunities as the organization scales #J-18808-Ljbffr Empathy Talent