TPU RTL Design Engineer for AI Acceleration
Google LLC is seeking an RTL Design Engineer to shape the future of AI/ML hardware acceleration, focusing on TPU architecture and its integration within AI/ML-driven systems. You will contribute to cutting-edge silicon solutions powering Google's AI capabilities for data centers. You will join a team responsible for SoC-level RTL design for data center accelerators, designing RTL IP with emphasis on chassis infrastructure, fabric bridges, and sensor telemetry networks, collaborating across
#J-18808-LjbffrVacancy posted 1 day ago
Similar jobs that could be interesting for youBased on the TPU RTL Design Engineer for AI Acceleration in Sunnyvale, CA vacancy
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San Jose, CA8 days ago - ...entrepreneurs with a vision to accelerate intelligent computing in the... ...and multi-die systems. We design and license disruptive... ...data center, infrastructure, AI, Automotive, and Edge IoT markets... ...! MICROARCHITECT AND RTL DESIGN ENGINEER SANTA CLARA, CA About...Night shift
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